• Journal of the Korean Society of Safety
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• v.16 no.1
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• pp.37-42
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• 2001

The severity of electric shock is entirely dependent on body resistance. When the human body becomes a part of electric circuit, the body resistance is given as a function of shock scenario. Factors which consist of applied voltage, shock duration, body current path and contact area, etc.. The body resistance is defined as the voltage applied to subjects divided by the body current. To secure safety of the subjects, the experiment is conducted on 10 subjects, the body current is limited to 4mA. And only three factors under many shock scenario conditions are used to determine the body resistance. The three factors are the applied voltage, the current pathway and the contact area. The object of this work is to estimate the dynamic resistance of the human body as a function of applied voltage using the body current at low-voltage levels. The data of the body current at low-voltage levels are extrapolated to high-voltage levels using two analytic functions with specified constants calculated by numerical method. Also we can provide permissible body voltage for various copper electrodes on the basis of the data determined with the dynamic resistance and the body current.

• Journal of Electrical Engineering and Technology
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• v.8 no.2
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• pp.316-325
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• 2013

Multilevel inverters produce a staircase output voltage from DC voltage sources. Requiring great number of semiconductor switches is main disadvantage of multilevel inverters. The multilevel inverters can be divided in two groups: symmetric and asymmetric converters. The asymmetric multilevel inverters provide a large number of output steps without increasing the number of DC voltage sources and components. In this paper, a novel topology for multilevel converters is proposed using cascaded sub-multilevel Cells. This sub-multilevel converters can produce five levels of voltage. Four algorithms for determining the DC voltage sources magnitudes have been presented. Finally, in order to verify the theoretical issues, simulation is presented.

• Proceedings of the KIEE Conference
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• 2004.11b
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• pp.158-161
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• 2004

This paper presents practical applications of reactive power and voltage planning to obtain voltage stability and operational voltage level for 2005 year summer peak Korea power system. It also describes the new electric facilities, operation criteria, voltage levels, MVAr flows, reactive power reserves in each control area. And reactive compensation devices are installed to maintain established voltage levels and stability margins. This simulation results show the improvement of voltage levels and the increase of reactive margins & interface flow margins. Finally, the paper reports the necessity of dynamic reactive reserves. It can be applied to analysis reactive compensation requirements and P-V & V-Q curves by PSS/E & VSAT.

• Journal of Electrical Engineering and Technology
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• v.8 no.6
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• pp.1328-1336
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• 2013

Nowadays multilevel inverters are developing generally due to reduced voltage stress on power switches and low total harmonic distortion (THD) in output voltage. However, for increasing the output voltage levels the number of circuit devices are increased and it results in increasing the cost of converter. In this paper, a novel multilevel inverter is proposed. The suggested topology uses less number of power switches and related gate drive circuits to generate the same level in output voltage with comparison to traditional cascaded multilevel inverter. With the proposed topology all levels in output voltage can be realized. As an illustration, a symmetric 13-level and asymmetric 29-level proposed inverters have been simulated and implemented. The total peak inverse (PIV) and power losses of presented inverter are calculated and compared with conventional cascaded multilevel inverter. The presented analyses show that the power losses in the suggested multilevel inverter are less than the traditional inverters. Presented simulation and experimental results demonstrate the feasibility and applicability of the proposed inverter to obtain the maximum number of levels with less number of switches.

• Journal of Power Electronics
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• v.14 no.4
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• pp.764-777
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• 2014

This study analyzes the mathematical relationship between DC-link voltage and system parameters for shunt active power filters (APFs). Analysis and mathematical deduction are used to determine the required minimum DC-link voltage for APF. A novel adaptive DC-link voltage controller for the three-phase four-wire shunt APF is then proposed. In this controller, the DC-link voltage reference value will be maintained at the required minimum voltage level. Therefore, power consumption and switching loss will effectively decrease. The DC-link voltage can also adaptively yield different DC-link voltage levels based on different harmonic currents and grid voltage levels and thus avoid the effects of harmonic current and grid voltage fluctuation on compensation performance. Finally, representative simulation and experimental results in a three-phase four-wire center-split shunt APF are presented to verify the validity and effectiveness of the minimum DC-link voltage design and the proposed adaptive DC-link voltage controller.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.4
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• pp.448-456
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• 2012

This paper presents a multilevel inverter configuration which is designed by insertion of a bidirectional switch between capacitive voltage sources and a conventional H-bridge module. The modified inverter can produce a better sinusoidal waveform by increasing the number of output voltage levels. By serial connection of two modified H-bridge modules, it is possible to produce 9 output voltage levels including zero. There are 24 basic switching patterns with the 9 output voltage levels. Among the patterns, we select the 2 most efficient switching patterns to get a lower switching loss and minimum dv/dt stress. We then analyze characteristics of Total Harmonic Distortion (THD) of the output voltage with variation of input voltage by computer-aided simulations and experiments.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.1-7
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• 2009

This paper describes design of high energy efficiency 32 bit parallel processor core using instruction-levels data gating and dynamic voltage scaling (DVS) techniques. We present instruction-levels data gating technique. We can control activation and switching activity of the function units in the proposed data technique. We present instruction-levels DVS technique without using DC-DC converter and voltage scheduler controlled by the operation system. We can control powers of the function units in the proposed DVS technique. The proposed instruction-levels DVS technique has the simple architecture than complicated DVS which is DC-DC converter and voltage scheduler controlled by the operation system and a hardware implementation is very easy. But, the energy efficiency of the proposed instruction-levels DVS technique having dual-power supply is similar to the complicated DVS which is DC-DC converter and voltage scheduler controlled by the operation system. We simulate the circuit simulation for running test program using Spectra. We selected reduced power supply to 0.667 times of the supplied power supply. The energy efficiency of the proposed 32 bit parallel processor core using instruction-levels data gating and DVS techniques can improve about 88.4% than that of the 32 bit parallel processor core without using those. The designed high energy efficiency 32 bit parallel processor core can utilize as the coprocessor processing massive data at high speed.

• Journal of international Conference on Electrical Machines and Systems
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• v.2 no.2
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• pp.190-196
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• 2013

It presents a unification of buck-boost and flyback converter for driving a cascaded H-bridge multilevel inverter with a single independent DC voltage source. Cascaded H-bridge multilevel inverter is useful to make many output voltage levels for sinusoidal waveform by combining two or more H-bridge modules. However, each H-bridge module needs an independent DC voltage source to generate multi levels in an output voltage. This topological characteristic brings a demerit of increasing the number of independent DC voltage sources when it needs to increase the number of output voltage levels. To solve this problem, we propose a converter combining a buck-boost converter with a flyback converter. The proposed converter provides independent DC voltage sources at back-end two H-bridge modules. After analyzing theoretical operation of the circuit topology, the validity of the proposed approach is verified by computer-aided simulations using PSIM and experiments.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.2
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• pp.29-35
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• 2013

For the purpose of designing and applying optimum surge protection, one of the essential points is to take into account the energy coordination between cascaded surge protective devices(SPDs) and it is important to obtain an acceptable sharing of the energy stress between two cascaded SPDs. In this paper, in case of two voltage-limiting SPDs connected in parallel, the amount of splitting impulse current and energy that flow through each SPDs is investigated as a function of the protective distance. As a result, the energetic coordination between cascaded SPDs is strongly dependent on the voltage protection level of SPDs and the protective distance. It was confirmed that the sharing of the energy between two cascaded SPDs and the limited voltage levels are appropriate when the voltage protection levels of both upstream and downstream SPDs are the same.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.4
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• pp.457-463
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• 2012

Cascaded H-bridge multilevel inverters shows a useful circuit configuration to increase the number of output voltage levels to obtain high quality output voltage. By applying the concept of the power of three to dc voltage sources, it can increase the number of output voltage levels effectively. To realize this concept, two approaches may be considered. One is to use independent dc voltage sources pre-scaled in the power of three, and the other is to use instantaneous dc voltage sources generated from a cascaded transformer, which has the secondary turn-ratios scaled in the power of three in sequence. A common feature in both approaches is to use the concept of the power of three for dc voltage sources, and a point of difference is whether it adopts a low frequency transformer or not, and where the transformer is located. According to the difference, application areas are limited and show different characteristics on THD of output voltages. We compare and analyze both approaches for their circuit configurations, voltage level generating method, THD characteristics of output voltage, efficiency, application areas, limitations, and other characteristics by experiments using 500 [W] prototypes when they generate a 27-level output voltage.