• 조명전기설비학회논문지
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• 제26권11호
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• pp.54-61
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• 2012

This study investigated the relationship between the response time of DVR (Dynamic Voltage Restorer) and the possible compensation range for voltage dips by the DVR system which protects the 3-phase phase-controlled rectifier from said dips. As a result, the permissible range of voltage dip is presented in a 3-phase phase-controlled rectifier. When the DVR compensates for voltage dip, the range of voltage dip can be compensated according to the DVR's response time. Using the proposed method, DVR response time can be determined from the parameters of the 3-phase phase-controlled rectifier and the possible compensatory range of voltage dip, while at the same time it is possible to use a control system having an appropriate speed. Therefore, the use of excessively fast equipment can be avoided, improving the stability of the overall system. The reliability of the DVR concerning the 3-phase phase-controlled rectifier can be verified by simulation.

• 제어로봇시스템학회논문지
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• 제10권4호
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• pp.325-333
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• 2004

It is investigated that the relation between the response time of DVR(Dynamic Voltage Restorer) and the possible compensation range of voltage dip by the DVR system which protects the 3-phase phase-controlled rectifier from voltage dip. As a result, the permissible range of voltage dip is presented in the 3-phase phase-controlled rectifier, and it is presented that the range of voltage dip which can be compensated according to the DVR s response time. when the DVR compensates voltage dip, Using the proposed method, the DVR s response time can be determined from the parameters of 3-phase phase-controlled rectifier and the possible compensation range of voltage dip, and it is possible to use the control system which have an appropriate speed. Therefore, the use of excessively fast device can be avoided, and the stability of the overall system is improved. Also the reliance of DVR about the 3-phase phase-controlled rectifier can be verified.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제52권5호
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• pp.238-245
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• 2003

In this paper, a single Phase voltage source voltage-controlled active power filter(APF) for power quality improvement was proposed. The proposed APF has the performance of harmonic suppression and unity power factor correction. The performance of harmonic suppression can be obtained by controlling the waveshape of the APF output voltage to be sine wave. And, unity power factor is controlled by the reactive power control loop of the APF output. Simulation and experimental results using diode rectifier showed that the voltage-controlled APF, unlike the current-controlled APF, can reduce the voltage harmonics as well as current harmonics. Also the results showed that the input dover factor and power quality were greatly improved.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권11호
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• pp.563-567
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• 2001

ln this paper, the designed DVSC(Discrete Variable Structure Controller) is applied to the robust control of voltage controlled APF(Active Power Filter). The voltage controlled APF has good characteristics of reducing harmonic current and harmonic voltage simultaneously. However, voltage controlled APF with large capacitor has slow dynamic response. For improving the dynamics and robustness against to disturbances, DVSC is adopted. According to the results of experiment and simulation, it is proved that the proposed system has the performance of improving dynamic response and robustness.

• Journal of Power Electronics
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• 제17권2호
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• pp.570-578
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• 2017

This paper proposes a method to stabilize the output voltage of the secondary side of an Inductive Power Transfer (IPT) system through tuning/detuning via a serial tuned DC Voltage-controlled Variable Capacitor (DVVC). The equivalent capacitance of the DVVC changes with the conduction period of a diode in the DVVC controlled by DC voltage. The output voltage of an IPT system can be made constant when this DVVC is used as a variable resonant capacitor combined with a PI controller generating DC control voltage according to the fluctuations of the output voltage. Since a passive diode instead of an active switch is used in the DVVC, there are no active switch driving problems such as a separate voltage source or gate drivers, which makes the DVVC especially advantageous when used at the secondary side of an IPT system. Moreover, since the equivalent capacitance of the DVVC can be controlled smoothly with a DC voltage and the passive diode generates less EMI than active switches, the DVVC has the potential to be used at much higher frequencies than traditional switch mode capacitors.

• Journal of Multimedia Information System
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• 제5권2호
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• pp.139-142
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• 2018

This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.

• 한국항행학회논문지
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• 제21권5호
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• pp.501-507
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• 2017

전자회로에서 부하가 제너다이오드일 경우, 입력전압에 의해 부하의 전류를 제어하고자 할 때 제너다이오드의 항복전압 특성에 따라 제어하고자 하는 출력전류가 변하기 때문에 기존의 전압제어 전류 생성 방법을 적용할 수 없다. 이 논문에서는 입력전압을 이용하여 정격치보다 큰 전류를 제너다이오드에 인가하여 부품의 수명시험을 할 때, 제너다이오드가 경년열화에 의하여 항복전압의 특성이 변하여 부하전압이 달라져도 이에 관계없이 동일한 전류를 낼 수 있는 회로를 개발하였다. 이 방법으로 구성된 회로를 실증하기 위해 각 블럭의 부품 값을 적용하고 시뮬레이션 하여 입력전압으로 출력전류를 선형적으로 제어하는 결과를 확인하였다. 결과에 의하면 우리가 측정하고자 하는 항복전압 이상의 입력전압에 대해서 출력전류가 선형적으로 변하며 제너다이오드의 경년열화에 의한 항복전압의 변화와 관계없이 일정한 전류가 흐르는 것을 확인하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1991년도 추계학술대회 논문집 학회본부
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• pp.207-209
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• 1991

This paper deals with voltage control method of PWM rectifier using current-controlled voltage type converter. A linearized model of the current-controlled rectifier is derived, which is used to examine the effect of controller gains to its dynamic responses. Through the simulation, it is shown that the proposed model is generally valid, which is confirmed by experimental results.

• 전기학회논문지
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• 제61권4호
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• pp.601-605
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• 2012

The non-controlled closing of High-voltage SF6 gas circuit breaker can cause transient current and overvoltage in the field. The controlled closing technology is an effective way to reduce transient current and voltage, prevent equipment failures, and improve power quality. For the development of controlled closing, it is obviously necessary to determine the withstand voltage between arc contacts of High-voltage SF6 gas circuit breaker in making operation. This paper focuses on decrease of pressure and density of SF6 gas that can affect withstand voltage between arc contacts in making operation. The dielectric strength between arc contacts could be improved by minimizing the decrement of pressure and density of SF6 gas obtained by simulation and test and moreover the rate of decrease of dielectric strength (RDDS) of arc contacts could be foreseen.

• International journal of advanced smart convergence
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• 제10권1호
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• pp.12-23
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• 2021

This paper proposes a low power radio frequency receiver front-end where, in a single stage, single-balanced mixer and voltage-controlled oscillator are stacked on top of low noise amplifier and re-use the dc current to reduce the power consumption. In the proposed topology, the voltage-controlled oscillator itself plays the dual role of oscillator and mixer by exploiting a series inductor-capacitor network. Using a 65 nm complementary metal oxide semiconductor technology, the proposed radio frequency front-end is designed and simulated. Oscillating at around 2.4 GHz frequency band, the voltage-controlled oscillator of the proposed radio frequency front-end achieves the phase noise of -72 dBc/Hz, -93 dBc/Hz, and -113 dBc/Hz at 10KHz, 100KHz, and 1 MHz offset frequency, respectively. The simulated voltage conversion gain is about 25 dB. The double-side band noise figure is -14.2 dB, -8.8 dB, and -7.3 dB at 100 KHz, 1 MHz and 10 MHz offset. The radio frequency front-end consumes only 96 ㎼ dc power from a 1-V supply.