• Title/Summary/Keyword: WAFER

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Effects of Forced Self Driving Function in Silicon Wafer Polishing Head on the Planarization of Polished Wafer Surfaces (실리콘 웨이퍼 연마헤드의 강제구동 방식이 웨이퍼 연마 평탄도에 미치는 영향 연구)

  • Kim, Kyoungjin;Park, Joong-Youn
    • Journal of the Semiconductor & Display Technology
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    • v.13 no.1
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    • pp.13-17
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    • 2014
  • Since the semiconductor manufacturing requires the silicon wafers with extraordinary degree of surface flatness, the surface polishing of wafers from ingot cutting is an important process for deciding surface quality of wafers. The present study introduces the development of wafer polishing equipment and, especially, the wafer polishing head that employs the forced self-driving of installed silicon wafer as well as the wax wafer mounting technique. A series of wafer polishing tests have been carried out to investigate the effects of self-driving function in wafer polishing head. The test results for wafer planarization showed that the LLS counts and SBIR of polished wafer surfaces were generally improved by adopting the self-driven polishing head in wafer polishing stations.

Clean mobile robot for wafer transfer (Wafer 낱장 반송용 이동 로봇의 개발)

  • 성학경;이성현;김성권
    • 제어로봇시스템학회:학술대회논문집
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    • pp.161-161
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    • 2000
  • The clean mobile robot for wafer transfer is AGV that carry each wafer to each equipment. It has wafer handling technology, wafer ID recognition technology, position calibration technology using vision system, and anti-vibration technology. Wafer loading/unloading working accuracy is within ${\pm}$1mm, ${\pm}$3$^{\circ}$. By application of this AGV, we can reduce the manufacturing tack time and bring cost down of equipment.

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Development of Scribing Machine for Semiconductor Wafer (반도체 웨이퍼용 스크라이빙 머신의 개발)

  • 차영엽;최범식;고경용
    • 제어로봇시스템학회:학술대회논문집
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    • pp.222-222
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    • 2000
  • The general dicing process cuts a semiconductor wafer to lengthwise and crosswise direction by using a rotating circular diamond blade. But inferior goods are made under the influence of several parameters in dicing such as blade, wafer, cutting water and cutting conditions. Moreover we can not applicable this dicing method to GaN wafer, because the GaN wafer is harder than the other wafer as GaAs. In older to overcome this problem, a new dicing process is necessary. This paper describes a new machine using scriber and precision servo mechanism in order to dice a semiconductor wafer.

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New Mechanism for Wafer Guide to Minimize the Drop in Wafer Transfer (반송 시 웨이퍼 이탈을 최소화 하기 위한 새로운 형태의 웨이퍼 가이드 메커니즘)

  • Kim, Dea-Won;Ryu, Jee-Hwan
    • Journal of the Semiconductor & Display Technology
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    • v.9 no.1
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    • pp.23-28
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    • 2010
  • In this paper, wafer drop from wafer guide mechanism, which is one of the serious problems in water transfer robot, is analyzed, and new wafer guide mechanisms are proposed to minimize this drop. Three types of new wafer guide mechanisms are proposed: roller type, gear type and L-shape rocker type. We choose one of the proposed mechanism, which is roller type, and verified this mechanism through real transfer experiment. Wafer picking up test is conducted with initial aligning error for simulating the wafer drop. Number of drop is compared between conventional mechanism and proposed mechanism. As a result, we can find the proposed mechanism can reduce the number of wafer drop dramatically.

A study on the optimal parameter design of rapid thermal processing to improve wafer temperature uniformity (8인치 웨이퍼의 온도균일도향상을 위한 고속열처리공정기의 최적 파라미터에 설게에 관한 연구)

  • 최성규;최진영;권욱현
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.10
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    • pp.68-76
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    • 1997
  • In this paper, design parameters of rapid thermal processing(RTP) to minimize the wafer temperature uniformity errors are proposed. Lamp ring positions and the wafer height are important parameters for wafer temperature uniformity in RTP. We propose the method to seek lamp ring positions and the wafer gheight for optimal temperature uniformity. The proposed method is applied to seek optimal lamp ring positions and the wafer feight of 8 inch wafer. To seek the optimal lamp ring positions and the wafer height, we vary lamp ring positions and the wafer height and then formulate the wafer temperature uniformity problem to the linear programming problem. Finally, it is shown that the wafer temperature uniformity in RTP designed by optimal problem. Finally, it is hsown that the wafer temperature uniformity is RTP designed by optimal parameters is improved to comparing with RTP designed by the other method.

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An Experimental Study on Wafer Demounting by Water Jet in a Waxless Silicon Wafer Mounting System

  • Kim, Kyoung-Jin;Kwak, Ho-Sang;Park, Kyoung-Seok
    • Journal of the Semiconductor & Display Technology
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    • v.8 no.2
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    • pp.31-35
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    • 2009
  • In the silicon wafer polishing process, the mounting stage of silicon wafer on the ceramic carrier block has been using the polishing template which utilizes the porous surface instead of traditional wax mounting method. Here in this article, the experimental study is carried out in order to study the wafer demounting by water jet and the effects of operating conditions such as the water jet flowrate and the number of water jet nozzles on the wafer demounting time. It is found that the measured wafer demounting time is inversely proportional to the water flowrate per nozzle, regardless of number of nozzles used; implying that the stagnation pressure by the water jet impingement is the dominant key factor. Additionally, by using the transparent disk instead of wafer, the air bubble formation and growth is observed under the disk, making the passage of water flow, and subsequently demounting the wafer from the porous pad.

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Effects of Change of Wafer Shape through Heating on Chemical Mechanical Polishing Process (가열에 의한 웨이퍼 형상 변화가 CMP에 미치는 영향)

  • 권대희;김형재;정해도
    • Journal of the Korean Society for Precision Engineering
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    • v.20 no.1
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    • pp.85-90
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    • 2003
  • Removal rate and Within Wafer Non-Uniformity (WIWNU), the most critical issues in Chemical Mechanical Polish (CMP) process, are related to the pressure distribution, wafer shape, slurry flow, mechanical property of pad and etc. Among them, wafer warp generated by other various manufacturing process of wafer may induce the deviation of pressure distribution on the backside of wafer. In the convex shaped wafer the pressure onto the backside of wafer is higher than that of perfectly flat shaped wafer. Besides, such an added pressure is in proportion to the curvature of wafer. That is, the bigger the curvature of wafer becomes the higher the removal rate goes. And the WIWNU is known to be directly related to the pressure distribution on the wafer as well. In other words, the deviation of pressure distribution is in proportion to the WIWNU. In this paper, it is found that the wafer shape may be modified through heating the backside of it and thus properly changed pressure onto the backside of it may improve the WIWNU.

A Wafer Pre-Alignment System Using One Image of a Whole Wafer (하나의 웨이퍼 전체 영상을 이용한 웨이퍼 Pre-Alignment 시스템)

  • Koo, Ja-Myoung;Cho, Tai-Hoon
    • Journal of the Semiconductor & Display Technology
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    • v.9 no.3
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    • pp.47-51
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    • 2010
  • This paper presents a wafer pre-alignment system which is improved using the image of the entire wafer area. In the previous method, image acquisition for wafer takes about 80% of total pre-alignment time. The proposed system uses only one image of entire wafer area via a high-resolution CMOS camera, and so image acquisition accounts for nearly 1% of total process time. The larger FOV(field of view) to use the image of the entire wafer area worsen camera lens distortion. A camera calibration using high order polynomials is used for accurate lens distortion correction. And template matching is used to find a correct notch's position. The performance of the proposed system was demonstrated by experiments of wafer center alignment and notch alignment.

A Wafer Alignment Method and Accuracy Evaluation (웨이퍼 정렬법과 정밀도 평가)

  • Park, Hong-Lae;Lyou, Joon
    • Journal of Institute of Control, Robotics and Systems
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    • v.8 no.9
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    • pp.812-817
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    • 2002
  • This paper presents a development of high accuracy aligner and describes a method to find the orientation of a substantially circular disk shaped wafer with at least one flat region on an edge thereof. In the developed system, the wafer is spun one 360 degree turn on a chuck and the edge position is measured by a linear array to obtain a set of data points at various wafer orientation. The rotation axis may differ from wafer center by an unknown eccentricity. The flat angle is found by fitting a cosine curve to the actual data to obtain a deviation. The maximum deviation is then corrected for errors due to a finite number of data points and wafer eccentricity by calculating an adjustment angle from data points on the wafer fiat. After determining the flat angle the wafer is spun to the desired orientation. The wafer eccentricity can be calculated from four of the data points located away from the flat edge region. and the wafer is then centered.

Effect of Contact Conductance and Semitransparent Radiation on Heat Transfer During CVD Process of Semiconductor Wafer (접촉전도와 반투명 복사가 반도체 웨이퍼의 CVD 공정 중 열전달에 미치는 영향)

  • Yoon, Yong-Seok;Hong, Hye-Jung;Song, Myung-Ho
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.32 no.2
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    • pp.149-157
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    • 2008
  • During CVD process of semiconductor wafer fabrication, maintaining the uniformity of temperature distribution at wafer top surface is one of the key factors affecting the quality of final products. Effect of contact conductance between wafer and hot plate on predicted temperature of wafer was investigated. The validity of opaque wafer assumption was also examined by comparing the predicted results with Discrete Ordinate solutions accounting for semitransparent radiative characteristics of silicon. As the contact conductance increases predicted wafer temperature increases and the differences between maximum and minimum temperatures within wafer and between wafer and hot plate top surface temperatures decrease. The opaque assumption always overpredicted the wafer temperature compared to semitransparent calculation. The influences of surrounding reactor inner wall temperature and hot plate configuration are then discussed.