• 제목/요약/키워드: WAFER

검색결과 3,064건 처리시간 0.197초

실리콘 웨이퍼 연마헤드의 강제구동 방식이 웨이퍼 연마 평탄도에 미치는 영향 연구 (Effects of Forced Self Driving Function in Silicon Wafer Polishing Head on the Planarization of Polished Wafer Surfaces)

  • 김경진;박중윤
    • 반도체디스플레이기술학회지
    • /
    • v.13 no.1
    • /
    • pp.13-17
    • /
    • 2014
  • Since the semiconductor manufacturing requires the silicon wafers with extraordinary degree of surface flatness, the surface polishing of wafers from ingot cutting is an important process for deciding surface quality of wafers. The present study introduces the development of wafer polishing equipment and, especially, the wafer polishing head that employs the forced self-driving of installed silicon wafer as well as the wax wafer mounting technique. A series of wafer polishing tests have been carried out to investigate the effects of self-driving function in wafer polishing head. The test results for wafer planarization showed that the LLS counts and SBIR of polished wafer surfaces were generally improved by adopting the self-driven polishing head in wafer polishing stations.

가열에 의한 웨이퍼 형상 변화가 CMP에 미치는 영향 (Effects of Change of Wafer Shape through Heating on Chemical Mechanical Polishing Process)

  • 권대희;김형재;정해도
    • 한국정밀공학회지
    • /
    • v.20 no.1
    • /
    • pp.85-90
    • /
    • 2003
  • Removal rate and Within Wafer Non-Uniformity (WIWNU), the most critical issues in Chemical Mechanical Polish (CMP) process, are related to the pressure distribution, wafer shape, slurry flow, mechanical property of pad and etc. Among them, wafer warp generated by other various manufacturing process of wafer may induce the deviation of pressure distribution on the backside of wafer. In the convex shaped wafer the pressure onto the backside of wafer is higher than that of perfectly flat shaped wafer. Besides, such an added pressure is in proportion to the curvature of wafer. That is, the bigger the curvature of wafer becomes the higher the removal rate goes. And the WIWNU is known to be directly related to the pressure distribution on the wafer as well. In other words, the deviation of pressure distribution is in proportion to the WIWNU. In this paper, it is found that the wafer shape may be modified through heating the backside of it and thus properly changed pressure onto the backside of it may improve the WIWNU.

반도체 웨이퍼용 스크라이빙 머신의 개발 (Development of Scribing Machine for Semiconductor Wafer)

  • 차영엽;최범식;고경용
    • 제어로봇시스템학회:학술대회논문집
    • /
    • /
    • pp.222-222
    • /
    • 2000
  • The general dicing process cuts a semiconductor wafer to lengthwise and crosswise direction by using a rotating circular diamond blade. But inferior goods are made under the influence of several parameters in dicing such as blade, wafer, cutting water and cutting conditions. Moreover we can not applicable this dicing method to GaN wafer, because the GaN wafer is harder than the other wafer as GaAs. In older to overcome this problem, a new dicing process is necessary. This paper describes a new machine using scriber and precision servo mechanism in order to dice a semiconductor wafer.

  • PDF

Wafer 낱장 반송용 이동 로봇의 개발 (Clean mobile robot for wafer transfer)

  • 성학경;이성현;김성권
    • 제어로봇시스템학회:학술대회논문집
    • /
    • /
    • pp.161-161
    • /
    • 2000
  • The clean mobile robot for wafer transfer is AGV that carry each wafer to each equipment. It has wafer handling technology, wafer ID recognition technology, position calibration technology using vision system, and anti-vibration technology. Wafer loading/unloading working accuracy is within ${\pm}$1mm, ${\pm}$3$^{\circ}$. By application of this AGV, we can reduce the manufacturing tack time and bring cost down of equipment.

  • PDF

반송 시 웨이퍼 이탈을 최소화 하기 위한 새로운 형태의 웨이퍼 가이드 메커니즘 (New Mechanism for Wafer Guide to Minimize the Drop in Wafer Transfer)

  • 김대원;유지환
    • 반도체디스플레이기술학회지
    • /
    • v.9 no.1
    • /
    • pp.23-28
    • /
    • 2010
  • In this paper, wafer drop from wafer guide mechanism, which is one of the serious problems in water transfer robot, is analyzed, and new wafer guide mechanisms are proposed to minimize this drop. Three types of new wafer guide mechanisms are proposed: roller type, gear type and L-shape rocker type. We choose one of the proposed mechanism, which is roller type, and verified this mechanism through real transfer experiment. Wafer picking up test is conducted with initial aligning error for simulating the wafer drop. Number of drop is compared between conventional mechanism and proposed mechanism. As a result, we can find the proposed mechanism can reduce the number of wafer drop dramatically.

8인치 웨이퍼의 온도균일도향상을 위한 고속열처리공정기의 최적 파라미터에 설게에 관한 연구 (A study on the optimal parameter design of rapid thermal processing to improve wafer temperature uniformity)

  • 최성규;최진영;권욱현
    • 전자공학회논문지D
    • /
    • v.34D no.10
    • /
    • pp.68-76
    • /
    • 1997
  • In this paper, design parameters of rapid thermal processing(RTP) to minimize the wafer temperature uniformity errors are proposed. Lamp ring positions and the wafer height are important parameters for wafer temperature uniformity in RTP. We propose the method to seek lamp ring positions and the wafer gheight for optimal temperature uniformity. The proposed method is applied to seek optimal lamp ring positions and the wafer feight of 8 inch wafer. To seek the optimal lamp ring positions and the wafer height, we vary lamp ring positions and the wafer height and then formulate the wafer temperature uniformity problem to the linear programming problem. Finally, it is shown that the wafer temperature uniformity in RTP designed by optimal problem. Finally, it is hsown that the wafer temperature uniformity is RTP designed by optimal parameters is improved to comparing with RTP designed by the other method.

  • PDF

웨이퍼 정렬법과 정밀도 평가 (A Wafer Alignment Method and Accuracy Evaluation)

  • 박홍래;유준
    • 제어로봇시스템학회논문지
    • /
    • v.8 no.9
    • /
    • pp.812-817
    • /
    • 2002
  • This paper presents a development of high accuracy aligner and describes a method to find the orientation of a substantially circular disk shaped wafer with at least one flat region on an edge thereof. In the developed system, the wafer is spun one 360 degree turn on a chuck and the edge position is measured by a linear array to obtain a set of data points at various wafer orientation. The rotation axis may differ from wafer center by an unknown eccentricity. The flat angle is found by fitting a cosine curve to the actual data to obtain a deviation. The maximum deviation is then corrected for errors due to a finite number of data points and wafer eccentricity by calculating an adjustment angle from data points on the wafer fiat. After determining the flat angle the wafer is spun to the desired orientation. The wafer eccentricity can be calculated from four of the data points located away from the flat edge region. and the wafer is then centered.

접촉전도와 반투명 복사가 반도체 웨이퍼의 CVD 공정 중 열전달에 미치는 영향 (Effect of Contact Conductance and Semitransparent Radiation on Heat Transfer During CVD Process of Semiconductor Wafer)

  • 윤용석;홍혜정;송명호
    • 대한기계학회논문집B
    • /
    • v.32 no.2
    • /
    • pp.149-157
    • /
    • 2008
  • During CVD process of semiconductor wafer fabrication, maintaining the uniformity of temperature distribution at wafer top surface is one of the key factors affecting the quality of final products. Effect of contact conductance between wafer and hot plate on predicted temperature of wafer was investigated. The validity of opaque wafer assumption was also examined by comparing the predicted results with Discrete Ordinate solutions accounting for semitransparent radiative characteristics of silicon. As the contact conductance increases predicted wafer temperature increases and the differences between maximum and minimum temperatures within wafer and between wafer and hot plate top surface temperatures decrease. The opaque assumption always overpredicted the wafer temperature compared to semitransparent calculation. The influences of surrounding reactor inner wall temperature and hot plate configuration are then discussed.

하나의 웨이퍼 전체 영상을 이용한 웨이퍼 Pre-Alignment 시스템 (A Wafer Pre-Alignment System Using One Image of a Whole Wafer)

  • 구자명;조태훈
    • 반도체디스플레이기술학회지
    • /
    • v.9 no.3
    • /
    • pp.47-51
    • /
    • 2010
  • This paper presents a wafer pre-alignment system which is improved using the image of the entire wafer area. In the previous method, image acquisition for wafer takes about 80% of total pre-alignment time. The proposed system uses only one image of entire wafer area via a high-resolution CMOS camera, and so image acquisition accounts for nearly 1% of total process time. The larger FOV(field of view) to use the image of the entire wafer area worsen camera lens distortion. A camera calibration using high order polynomials is used for accurate lens distortion correction. And template matching is used to find a correct notch's position. The performance of the proposed system was demonstrated by experiments of wafer center alignment and notch alignment.

최적 dechucking 시스템 구현에 관한 연구 (A Study on the Implementation of Optimized Dechucking System)

  • 서종완;서희석;신명철
    • 조명전기설비학회논문지
    • /
    • v.21 no.5
    • /
    • pp.106-111
    • /
    • 2007
  • 반도체 공정에서 각 단계별 과정을 거친 후 dechucking시 wafer가 ESC(Electrostatic Chuck)로부터 방전되지 못하고, 잔류되어 있는 극성을 띤 전하(Electric charge)들에 의해 wafer와 ESC사이에 인력이 발생하여 wafer의 sliding, popping 및 wafer broken 등의 문제가 발생한다. 본 논문에서는 wafer와 ESC의 구성을 capacitor를 이용하여 modeling하고, PSpice를 사용하여 chucking system에 의한 wafer의 대전 현상을 모의하고 그 결과를 바탕으로 잔류전하를 방전시키기 위한 여러 가지 방법을 검토하여 최적의 잔류전하 제거 기법을 제시한다. 즉 별도의 전압원을 사용하여 (+)와 (-)를 교번하는 구형파를 인가함과 아울러 일정시간 동안 Plasma내에서 스위칭시킴으로써 ESC나 wafer에 charge되어 있는 극성을 띤 전하들을 중화(Neutralize) 시키도록 하였다. 그리고 이를 실제 하드웨어로 구현하여 실 공정에 적용한 결과를 제시한다.