• Title/Summary/Keyword: WAFER

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The optimal paremeter design of rapid thermal processing to improve wafer temperature uniformity on the semiconductor manufacturing (반도체 공정에서 웨이퍼의 온도균일도향상을 위한 고속열처리공정기의 최적 파라미터 설계)

  • 최성규;최진영;권욱현
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.1508-1511
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    • 1997
  • In this paper, design parameters of Rapid Thermal Processing(RrW) to minimize the wafer tempera ture uniformity errors are proposed. 1,anip ling positions and the wafer height are important parameters for waf er temperature uniformity in R'I'P. We propose the method to seek lamp ling positions and the wafer height for optimal temperature uniformity. l'he ~~roposed method is applied to seek optimal lamp ling positions and the waf er height of 8 inch wafer. 'I'o seek the optimal lamp ling positions and the wafer height, we var\ulcorner. lamp ling 110s itions and the wafer height and then formulate the wafer temperature uniformity problem to the linear programmi ng problem. Finally, it is shown that the wafer temperature uniformity in RI'I' designed by optimal prarneters is improved to comparing with Ii'l'P designed by the other method.

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The Trend of wafer Grinding Technology and Improvement of Machining Accuracy (웨이퍼 연삭 가공 기술의 동향 및 가공 정밀도 향상에 관한 연구)

  • 안대균;황징연;이재석;이용한;하상백;이상직
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.05a
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    • pp.20-23
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    • 2002
  • In silicon wafer manufacturing process, the grinding process has been adopted to improve the quality of wafer such as flatness, roughness and so on. This paper describes the effect of grinding process on the surface quality of wafer. The experiments are carried out by high precision in fred grinder with air bearing spindle. The relationship between the inclination of chuck table and the flatness of wafer is investigated, and the effect of grinding conditions including wheel speed, table speed, and feed rate on damage depth and roughness of wafer is also investigated. The experimental results show that there is close relationship between the inclination of the chuck table and the flatness of wafer, and the grinding conditions within this paper little affect the flatness of wafer and relatively high affect the damage depth of wafer.

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A Study on the FEM Analysis and Gripping Force Control of End-Effector for the Wafer Handling Robot System (Wafer 반송용 End-Effector의 FEM 해석 및 파지력 제어에 관한 연구)

  • 권오진;최성주;이우영;이강원;박원규
    • Journal of the Semiconductor & Display Technology
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    • v.2 no.3
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    • pp.31-36
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    • 2003
  • On this study, an E.E(End-Effector) for the 300 mm wafer transfer robot system is newly suggested. It is a mechanical type with $180^{\circ}$ rotating ranges and is composed of 3-point arms, two plate springs and single-axis DC motor controlled by microchip. To design, relationship between the gripping force and the wafer deformation is analyzed by FEM. By analytic results, the gripping force for 300 mm wafer is confirmed as 255~274 gf. From experimental results on gripping force, repeatable position accuracy and gripping cycle times in a wafer cleaning system, we confirmed that the suggested E.E was well designed to satisfiy on the required performance for 300 mm wafer transfer robot system.

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Development of Breaking Machine for Semiconductor Wafer (반도체 웨이퍼용 브레이킹 머신의 개발)

  • 차영엽;최범식
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2000.11a
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    • pp.729-732
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    • 2000
  • The general dicing process cuts a semiconductor wafer to lengthwise and crosswise direction by using a rotating circular diamond blade. But inferior goods are made under the influence of several parameters in dicing such as blade, wafer, cutting water and cutting condition. Moreover we can not applicable this dicing method to GaN wafer, because the GaN wafer is harder than the other wafer as GaAs. In order to overcome this problem, a new dicing process is necessary. This paper describes a new machine using scriber, breaker, and precision servo mechanism in order to dice an semiconductor wafer.

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A New Dicing Method for Semiconductor Wafer (반도체 웨이퍼를 위한 새로운 다이싱 방법)

  • Cha, Young-Youp;Choi, Bum-Sick
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.27 no.8
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    • pp.1309-1316
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    • 2003
  • The general dicing process cuts a semiconductor wafer to lengthwise and crosswise direction by using a rotating circular diamond blade. But products with inferior quality are produced under the influence of several parameters in dicing process such as blade, wafer, cutting water and cutting conditions. Moreover we can not apply this dicing method to GaN wafer, because the GaN wafer is harder than the other wafer such as SiO2, GaAs, GaAsP, and AlGaAs. In order to overcome this problem, development of a new dicing process and determination of dicing parameters are necessary. This paper describes a new wafer dicing method using fixed diamond scriber and precision servo mechanism and determination of several parameters - scribing depth, scribing force, scriber inclined angle, scribing speed, and factor for scriber replacement - for a new dicing machine using scriber.

Development of The 3-channel Vision Aligner for Wafer Bonding Process (웨이퍼 본딩 공정을 위한 3채널 비전 얼라이너 개발)

  • Kim, JongWon;Ko, JinSeok
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.1
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    • pp.29-33
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    • 2017
  • This paper presents a development of vision aligner with three channels for the wafer and plate bonding machine in manufacturing of LED. The developed vision aligner consists of three cameras and performs wafer alignment of rotation and translation, flipped wafer detection, and UV Tape detection on the target wafer and plate. Normally the process step of wafer bonding is not defined by standards in semiconductor's manufacturing which steps are used depends on the wafer types so, a lot of processing steps has many unexpected problems by the workers and environment of manufacturing such as the above mentioned. For the mass production, the machine operation related to production time and worker's safety so the operation process should be operated at one time with considering of unexpected problem. The developed system solved the 4 kinds of unexpected problems and it will apply on the massproduction environment.

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Evaluation of a Wafer Transportation Speed for Propulsion Nozzle Array on Air Levitation System

  • Moon, In-Ho;Hwang, Young-Kyu
    • Journal of Mechanical Science and Technology
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    • v.20 no.9
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    • pp.1492-1501
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    • 2006
  • A transportation system of single wafer has been developed to be applied to semiconductor manufacturing process of the next generation. In this study, the experimental apparatus consists of two kinds of track, one is for propelling a wafer, so called control track, the other is for generating an air film to transfer a wafer, so called transfer track. The wafer transportation speed has been evaluated by the numerical and the experimental methods for three types of nozzle position a..ay (i.e., the front-, face- and rear-array) in an air levitation system. Test facility for 300mm wafer has been equipped with two control tracks and one transfer track of 1500mm length from the starting point to the stopping point. From the present results, it is found that the experimental values of the wafer transportation speed are well in agreement with the computed ones. Namely, the computed values of the maximum wafer transportation speed $V_{max}$ are slightly higher than the experimental ones by about $15{\times}20%$. The disparities in $V_{max}$ between the numerical and the experimental results become smaller as the air velocity increases. Also, at the same air flow rate, the order of wafer transportation speeds is : $V_{max}$ for the front-array > $V_{max}$ for the face-array > $V_{max}$ for the rear-array. However, the face-array is rather more stable than any other type of nozzle array to ensure safe transportation of a wafer.

SiC 웨이퍼의 휨 현상에 대한 열처리 효과

  • Yang, U-Seong;Lee, Won-Jae;Sin, Byeong-Cheol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.81-81
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    • 2009
  • 반도체 산업의 중심 소재인 실리콘(Si)은 사용 목적과 환경에 따라 물성적 한계가 표출되기 시작했다. 그래서 각각의 목적에 맞는 재료의 개발이 필요하다는 것을 인식하게 되었다. SiC wafer는 큰 band gap energy와 고온 안정성, 캐리어의 높은 드리프트 속도 그리고 p-n 접합이 용이하다. 또한 소재 자체가 화학적으로 안정하고 $500\sim600^{\circ}C$에서 소자 제조 시 고온공정이 가능하며, 실리콘이나 GaAs에 비해 고출력을 낼 수 있는 재료이다. 반도체 소자로 이용하기 위한 wafer 가공 공정에 있어 물리적 힘에 의한 stress를 많이 받아 wafer가 휘는 현상이 생긴다. 반도체 소자의 기본이 되는 wafer가 휨 현상을 일으키면 wafer 위에 소자가 올라갈 경우 소자의 불균일성 때문에 반도체의 물성에 나쁜 영향을 미치게 된다. 그래서 반도체 소자의 기본이 되는 wafer의 휨 현상 개선이 중요하다. 본 연구에서는 산화로에서 Ar 분위기에서 압력 760torr, 온도 $1100^{\circ}C$ 부근에서의 조건으로 진행을 하여 wafer의 Flatness Tester(FT-900, NIDEK) 장비로 SORI, BOW, GBIR 값의 변화에 초점을 맞추었다. SiC 단결정을 sawing후 가공 전 wafer를 열처리하여 가공을 진행하는 것과 열처리 하지 않은 wafer의 SORI, BOW, GBIR 값 비교, 그리고 lapping, grinding, polishing 등의 가공 진행 중간 중간에 열처리를 하여 진행하는 것과 가공 진행 중간 중간에 열처리를 하지 않고 진행한 wafer의 SORI, BOW, GBIR 값의 비교를 통해 wafer의 휨 현상 개성에 관해 알아본다.

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Comparison of Cu wafer and Disc using the electrochemical and Friction method during the CMP (Chemical Mechanical Planarization) (CMP 공정중 전기화학적 방법과 마찰력을 이용하여 Cu wafer와 Disc의 특성 비교)

  • Kang, Young-Jae;Eom, Dae-Hong;Song, Jae-Hoon;Park, Jin-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07b
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    • pp.1300-1303
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    • 2004
  • Copper는 낮은 저항률과 높은 Electromigration 저항 때문에 반도체 소자에 배선 재료로 사용된다. CMP 공정을 이용 하여 Cu wafer의 여러 가지 특성을 파악하기에는 wafer의 소모량이 많고 고가가의 비용이 예상 되므로, 본 논문에서는 비용절감을 위하여 wafer를 Disc로 대체 하고자 실험을 진행 하였고 Cu wafer와 Disc의 비료 방법은 우선 PM-5 (Genitech. co) 장비를 이용하여 removal rate의 차이점을 알 아 보았으며, 서로의 etch rate을 reomval rate과 비교하였다. EG&G 273A를 통하여 Cu wafer와 disc의 corrosion potential과 $R_p$ (Polarization resistance)값을 서로 비교 하였다. 이 논문에서는 이러한 것들을 서로 비교 하여, Cu wafer와 disc에서의 상관관계를 알고자 하였으며, 만약에 Cu wafer와 disc의 특성이 비슷하다면, Cu wafer 대신에 disc를 이용 하여 실험하여도 되는지에 관하여 조사 하였다.

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The Study on the Wafer Surface and Pad Characteristic for Optimal Condition in Wafer Final Polishing (최적조건 선정을 위한 Pad 특성과 Wafer Final Polishing의 가공표면에 관한 연구)

  • Won, Jong-Koo;Lee, Eun-Sang;Lee, Sang-Gyun
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.11 no.1
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    • pp.26-32
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    • 2012
  • Polishing is one of the important methods in manufacturing of Si wafers and in thinning of completed device wafers. This study will report the characteristic of wafer according to processing time, machining speed and pressure which have major influence on the abrasion of Si wafer polishing. It is possible to evaluation of wafer abrasion by load cell and infrared temperature sensor. The characteristic of wafer surface according to processing condition is selected to use a result data that measure a pressure, machining speed, and the processing time. This result is appeared by the characteristic of wafer surface in machining condition. Through that, the study cans evaluation a wafer characteristic in variable machining condition. It is important to obtain optimal condition. Thus the optimum condition selection of ultra precision Si wafer polishing using load cell and infrared temperature sensor. To evaluate each machining factor, use a data through each sensor. That evaluation of abrasion according to variety condition is selected to use a result data that measure a pressure, machining speed, and the processing time. And optimum condition is selected by this result.