• Journal of the Korea Society of Computer and Information
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• v.24 no.6
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• pp.1-9
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• 2019

Hard disks, which have long been used as secondary storage in computing systems, are increasingly being replaced by solid state drives (SSDs), due to their relatively fast data input / output speeds and small, light weight. SSDs that use NAND flash memory as a storage medium are significantly different from hard disks in terms of physical operation and internal operation. In particular, there is a feature that data overwrite can not be performed, which causes erase operation before writing. In order to solve this problem, a hot data for frequently updating a data for a specific page is distinguished from a cold data for a relatively non-hot data. Hot data identification helps to improve overall performance by identifying and managing hot data separately. Among the various hot data identification methods known so far, there is a technique of recording consecutive write requests by using a Bloom filter and judging the values by hot data. However, the Bloom filter technique has a problem that a new bit array must be generated every time a set of items is changed. In addition, since it is judged based on a continuous write request, it is possible to make a wrong judgment. In this paper, we propose a method using a counting filter for accurate hot data verification. The proposed method examines consecutive write requests. It also records the number of times consecutive write requests occur. The proposed method enables more accurate hot data verification.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.80-90
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• 2016

Thanks to superior leakage energy efficiency compared to SRAM cells, STTRAM cells are considered as a promising alternative for a memory element in on-chip caches. However, the main disadvantage of STTRAM cells is high write energy and latency. In this paper, we propose a low-cost write filter (WF) cache which resides between the load/store queue and STTRAM-based L1 data cache. To maximize efficiency of the WF cache, the line allocation and access policies are optimized for reducing energy consumption of STTRAM-based L1 data cache. By efficiently filtering the write operations in the STTRAM-based L1 data cache, our proposed WF cache reduces energy consumption of the STTRAM-based L1 data cache by up to 43.0% compared to the case without the WF cache. In addition, thanks to the fast hit latency of the WF cache, it slightly improves performance by 0.2%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.9
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• pp.2040-2048
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• 2010

In contemporary society, though convenience and efficiency of work using information system is growing high, adverse effect problems of malignant code, system hacking, information leak by insiders due to the development of the network are raising their head daily. Because of this, enormous work forces and expenses for the recovery and management of system is needed. The existing system can be divided into two aspects: security solution which surveils and treats virus and malignant codes, and network management solution which observes the system of computer, and practices maintenance and repair such as management, recovery, backup. This treatise applied Active Write Filter mechanism and the technology based on NFS and complemented the maintenance problems of user data of the existing system and designed the system which enables solving problems of intellectual property right such as information protection and illegal work.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.27 no.1
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• pp.25-31
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• 2003

Airborne contaminant particles are intruded into optical disk drives(ODD) due to the flow caused by disk rotation and can be adhered to lens or disk surfaces, which causes decrease of laser power and increase of read/write errors. Such a phenomenon can be more serious as the space between the disk and the lens is reduced fur high-density storage devices. The purpose of this paper is to understand design parameters to reduce the particle intrusion into an ODD. Suggestions are made to prevent the particle intrusion that can decrease the stability of an ODD and also prevent the potential heat build-up problem. The sealing effect of drive and the forced injection of clean air (using HEPA filter) into the drive minimizes intrusion of the outside air and dusts in an ODD remarkably. Moreover it is proved by experiments that the installation of a heatproof pad to isolate heat generation part (PCB) from information read/write sections and the forced injection of dust-free air reduce the gas temperature inside the drive as well as the amount of particles intruded.

• Journal of the Korean Society of Safety
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• v.12 no.3
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• pp.60-66
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• 1997

In this paper, a moving object surveillance system, which can extract moving object in real-time, using image subtraction method is described. This technique based on the novelty filter having the structure of neural network associative memory. Digital arithmetic and timing control parts were composed of hardwired controller to treat two-dimensional massive image information. SRAMS having 20 ns access time were used for the image buffer that has high speed write/read property. Image extraction algorithm is discussed and supported by simulation and experiments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.3
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• pp.121-126
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• 2014

Demand of the data storage becomes more and more growing. This requests the next generation of storage devices to have the dominated storage capability associated with superfast read/write rate. Holographic data storage (HDS) is investigated for a long time and is considered to be a candidate for the future storage system. However, it has two-dimensional intersymbol interference that conventional one-dimensional detection solutions have not yet handled strictly because of the complexity level of system as well as the cost. We propose a new scheme that combines iterative soft output Viterbi algorithm with noise filter for improving the bit error rate performance of HDS.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.20-27
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• 2010

This paper describes a design of 5-stage pipelined de-blocking filter with power reduction scheme and proposes a efficient memory architecture and filter order for high performance H.264/AVC Decoder. Generally the de-blocking filter removes block boundary artifacts and enhances image quality. Nevertheless filter has a few disadvantage that it requires a number of memory access and iterated operations because of filter operation for 4 time to one edge. So this paper proposes a optimized filter ordering and efficient hardware architecture for the reduction of memory access and total filter cycles. In proposed filter parallel processing is available because of structured 5-stage pipeline consisted of memory read, threshold decider, pre-calculation, filter operation and write back. Also it can reduce power consumption because it uses a clock gating scheme which disable unnecessary clock switching. Besides total number of filtering cycle is decreased by new filter order. The proposed filter is designed with Verilog-HDL and functionally verified with the whole H.264/AVC decoder using the Modelsim 6.2g simulator. Input vectors are QCIF images generated by JM9.4 standard encoder software. As a result of experiment, it shows that the filter can make about 20% total filter cycles reduction and it requires small transposition buffer size.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.755-758
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• 2014

In this paper, we propose effective Deblocking Filter hardware architecture for High Efficiency Video Coding encoder. we propose Deblocking Filter hardware architecture with less processing time, filter ordering for low area design, effective memory architecture and four-pipeline for a high performance HEVC(High Efficiency Video Coding) encoder. Proposed filter ordering can be used to reduce delay according to preprocessing. It can be used for realtime single-port SRAM read and write. it can be used in parallel processing by using two filters. Using 10 memory is effective for solving the hazard caused by a single-port SRAM. Also the proposed filter can be used in low-voltage design by using clock gating architecture in 4-pipeline. The proposed Deblocking Filter encoder architecture is designed by Verilog HDL, and implemented by 100k logic gates in TSMC $0.18{\mu}m$ process. At 150MHz, the proposed Deblocking Filter encoder can support 4K Ultra HD video encoding at 30fps, and can be operated at a maximum speed of 200MHz.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.2 no.1
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• pp.73-79
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• 2009

Analyze semantic of files recorded in the user's computer file system based on C++ program language which pursue modularization program and object-oriented programming language. And this refers to it, it design that clustering semantic of filename with thesaurus for user convenience. WTPM makes User Write Files into Cluster with thesaurus semantic structure and reserved words. WTPM process has designed for Icon file's display Mashup structure and implemented by automation algorithm of classification.

• Proceedings of the Korea Information Processing Society Conference
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• 2012.11a
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• pp.1479-1481
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• 2012

본 논문은 내부 혹은 외부의 바이러스의 피해 및 비행자료 변조 및 수정 등의 해킹 발생에서 비행자료 시스템의 가용성, 신뢰성 및 무결성을 강화시켜 비행자료시스템 운영 시 관제 서비스를 마비시키는 다양한 사이버 테레에 대응하여 실시간으로 자동으로 재해를 복구하는 시스템 및 그 방법에 대한 것이다. 비행자료시스템 실시간 자동재해복구시스템은 임베디드 시스템을 제공하며, EWF(Enhanced Write Filter)를 이용하며 OS(Operating System)을 보호하여 시스템을 안전하게 운용할 수 있는 장점을 갖는다.