• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.711-713
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• 2004

In the past time, the protection relay did only a protection function. Currently, its upgraded device i.e. IED(Intelligent Electric Device) has been designed to protect, control, and monitor the whole power system automatically. Also the device is desired to successfully measure important elements of the power system. This paper considers design method of a digital protection IED with a function of measuring various elements and a communication function. The protection IED is composed of the specific function modules that are signal process module, communication module, input/output module and main control module. A signal process module use a DSP processor for analysis of input signal. Main control module use a embedded processor, Xscale, that has an ARM Core. The communication protocol uses IEC61850 protocol that becomes standard in the future. The protection IED is able to process mass information with high-performance processor. As each function module is designed individually, the reliability of the device can be enhanced.

• The KIPS Transactions:PartA
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• v.12A no.5 s.95
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• pp.365-374
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• 2005

Schedulability analysis is necessary to build reliable embedded real-time systems. For schedulability analysis, worst-case execution time(WCET) analysis that computes upper bounds of the execution times of tasks, is required indispensably. WCET analysis is done in two phases. The first phase is high-level analysis that analyzes control flow and finds longest paths of the program. The second phase is low-level analysis that computes execution cycles of basic blocks taking into account the hardware architecture. In this thesis, we design and implement integrated WCET analysis tools. We develop the WCET analysis tools for XScale-based system called WATER(WCET Analysis Tool for Embedded Real-time system). WATER consist of high-level flow analyzer and low-level execution time analyzer. Also, We compare real measurement for execution of program with analysis result calculated by WATER.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.285-288
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• 2005

We propose a novel programmable miniature vision module based on a custom designed analog VLSI (aVLSI) chip. The vision module consists of the optical flow vision sensor embedded with commercial off-the-shelves digital hardware; in our case is the Intel XScale PXA270 processor enforced with a programmable gate array device. The aVLSI sensor provides gray-scale imager data as well as smooth optical flow estimates, thus each pixel gives a triplet of information that can be continuously read out as three independent images. The particular computational architecture of the custom designed sensor, which is fully parallel and also analog, allows for efficient real-time estimations of the smooth optical flow. The Intel XScale PXA270 controls the sensor read-out and furthermore allows, together with the programmable gate array, for additional higher level processing of the intensity image and optical flow data. It also provides the necessary standard interface such that the module can be easily programmed and integrated into different vision systems, or even form a complete stand-alone vision system itself. The low power consumption, small size and flexible interface of the proposed vision module suggests that it could be particularly well suited as a vision system in an autonomous robotics platform and especially well suited for educational projects in the robotic sciences.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.7
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• pp.469-477
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• 2009

In mobile systems, energy efficiency is critical to extend battery life. Therefore, power consumption should be taken into account to develop software in addition to performance, Efficient software design in power and performance is possible if accurate power prediction is accomplished during the execution of software, In this paper, power estimation model is developed using statistical analysis, The proposed model analyzes processor behavior Quantitatively using the data of performance monitoring events and power consumption collected by executing various benchmark programs, And then representative hardware events on power consumption are selected using hierarchical clustering, The power prediction model is established by regression analysis in which the selected events are independent variables and power is a response variable, The proposed model is applied to a PXA320 mobile processor based on Intel XScale architecture and shows average estimation error within 4% of the actual measured power consumption of the processor.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.5
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• pp.137-147
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• 2008

Recently, Power and thermal management are becoming major concerns in computer system design. The energy efficiency is an important attribute of the mobile and embedded systems. Today's powerful mobile processors needs more energy and longer battery life. Many research has been focused to reduce energy consumption for the mobile processors.In this paper, performance monitoring system for the Power-management techniques is implemented for Intel's XScale microarchitecture-based Marvell PXA320 processor on Windows CE platform. It also provides software interface for changing DVFS configuration. Performance and power consumption are measured for benchmark programs through performance counter value and voltage/current measurements on LabVIEW platform. By using the developed monitoring system, it is possible for dynamic power management to track processor's workload and to determine the actual power consumption.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.971-974
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• 2005

In this paper, we describe photonic sensor interface in SOPC(System on a programmable chip) platform. This platform uses device that has ARM922T processor and APEX FPGA area on a chip. We use two development kits. The one is embedded kit that using Intel's Xscale device, the another is SOPC kit that using Altera's Excalibur device. We implement some device logic that DMAC, ADCC, etc. and application.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.33-35
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• 2004

In this paper, web based monitoring systems are implemented for multi-axis force control systems of an intelligent robot. Linux operating systems are ported to an embedded system which Include a Xscale processor to implement a web based monitoring system. A device driver is developed to receive data from multi-axis force sensors of intelligent robots. To control this device driver, a socket program for Labview is also developed.

• Proceedings of the Korea Information Processing Society Conference
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• 2007.11a
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• pp.974-977
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• 2007

본 논문은 성능 카운터를 이용하여 Intel XScale 마이크로아키텍쳐 기반의 Marvell PXA320 프로세서에 대한 성능 모니터링을 구현하였다. Windows CE 운영체제 환경의 응용프로그램에 대하여 DVFS 구성에 따른 각각의 벤치마크를 측정하였고, 성능 이벤트에 따른 성능 카운터 값을 측정 하였다. 성능 모니터링으로 측정된 데이터를 기반으로 DVFS 기법을 위한 스케줄링이 가능하다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.493-497
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• 2005

This paper is about the research of the User Agent implementation under wireless embedded environment, using SIP which is one of protocol components construct the VoIP system. The User Agent is made of the User Agent configuration block, the device thread block to control devices and the SIP stack block to process SIP messages. The device thread consists of the RTP thread and the sound lard device processing block. Futhermore, the SIP stack consist of the worker thread to process proxy events, the SIP transceiver and SIP thread to transfer and receive SIP messages. The H/W platform is a board included the Intel's XScale PXA255 processor, flash memory, SDRAM, Audio CODEC module and wireless LAN threough PCMCIA socket, furthermore a microphone and headphone is used by the audio 1/0. The system has embedded linux kernel 2.4.19. For embedded environment, the function of User Agent and SIP method is diminished. Finally, the resource of system could be reduced about $12.9\%$, compared to overall system resource, by minimizing peripherals control and excepting TCP.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.413-416
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• 2007

Use ot Intelligent devices that work on the ANSI/EIA 709.1 protocol is increasing. In this study an ANSI/EIA 709.1 protocol analyzer that can monitor and analyze the packets on LonWorks network is designed and developed. The device is based on TMS320LF2407A processor for decoding data packets, and uses XScale processor for sending data to the application program on PC. The application program has various analysis features as well as basic monitoring function. The developed device can be used for debugging purposes in development of any kind of LonWorks devices, and also it is useful in maintenance of LonWorks network or Lon Works devices.