• Title/Summary/Keyword: analogue circuits

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Analogue-Digital Hybrid Circuit for an Adaptive Fuzzy Network

  • Han, Il-Song
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.838-841
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    • 1993
  • This paper describes a fuzzy network circuit of analogue and digital mixed operation. The circuits are suggested for membership function, MIN function and normalization function using either linear voltage-controlled MOSFET resistance or pulse stream operation. The analogue-digital hybrid fuzzy hardware is extensible to the fuzzy-neural network as its basic configurations are already used in URAN-I of 135,424 synaptic connections.

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New Inductance Simulator Topologies Realized with DO-OTAs

  • Kuntman, Hakan;Menekay, Serdar;Cicekoglu, Oguzhan;Kuntman, Ayten
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.391-394
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    • 2000
  • In this paper four lossy and one lossless inductance simulator topologies employing a single DO-OTA are presented. For the topologies proposed the inductance $L_{eq}$ and the series resistance $R_{eq}$ are independently adjustable. The topologies employ a single capacitor and are canonic in the number of capacitors. The resistors in the topologies can easily be implemented also with DO-OTAs. In this case the topologies proposed change to DO-OTA-C inductor simulators which is important from the integration point of view. Simulation results are included to verify theory.

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Computational circuits using neural optimization concept (신경회로망의 최적화 개념을 이용한 연산회로)

  • 강민제;고성택
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.2 no.1
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    • pp.157-163
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    • 1998
  • A neural network structure able to perform the operations of analogue and binary addition is proposed. The network employs Hopfield' model of a neuron with the connection elements specified on the basis of an analysis of the energy function. Simulation using NMOS neurons has shown convergence predominantly to the correct global minima.

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Development of Seismic Recorder for Long-term Observation of Microearthquakes (미소지진(微小地震) 장기관측(長期觀測)을 위한 지진기록계(地震記錄計)의 개발(開發))

  • Kim, Sung Kyun;Cho, Kyu Jang;Chung, Bu Heung;Moon, Chang Bae;Sin, In Chul;Sung, Rack Hoon
    • Economic and Environmental Geology
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    • v.21 no.2
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    • pp.185-191
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    • 1988
  • A two channel seismic recorder suitable for long-term observation of microearthquakes is developed. The direct analogue recording on cassette tape is adopted in the recorder whose circuits of amplifier and mortor units of an audio cassette recorder are modified. The recorder provides contineous record of 10 days with DC 12V battery (100AH) and with standard cassette tape of 60 minute use. The binary coded time signals of date, hour, and minute are generated once a minute by the timing system and absolute time input using radio to measure the time drift is also possible. For the seismic signal processing, the analogue signals from audio cassette player pass A/D converter and digitized data are stored in personal computer. Then visual records can be obtained using computer graphic mode. Basic programs "ADCONVO" and "DRAWO" to accomplish A/D conversions, the creation of data files and visualization of signals were written. Some sample signals reproduced from the recorded tape are presented.

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Evaluation of Low Power and High Speed CMOS Current Comparators

  • Rahman, Labonnah Farzana;Reaz, Mamun Bin Ibne;Marufuzzaman, Mohammad;Mashur, Mujahidun Bin;Badal, Md. Torikul Islam
    • Transactions on Electrical and Electronic Materials
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    • v.17 no.6
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    • pp.317-328
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    • 2016
  • Over the past few decades, CMOS current comparators have been used in a wide range of applications, including analogue circuits, MVL (multiple-valued logic) circuits, and various electronic products. A current comparator is generally used in an ADC (analog-to-digital) converter of sensors and similar devices, and several techniques and approaches have been implemented to design the current comparator to improve performance. To this end, this paper presents a bibliographical survey of recently-published research on different current comparator topologies for low-power and high-speed applications. Moreover, several aspects of the CMOS current comparator are discussed regarding the design implementation, parameters, and performance comparison in terms of the power dissipation and operational speed. This review will serve as a comparative study and reference for researchers working on CMOS current comparators in low-power and high-speed applications.

A Study of Parameter Estimation for First Order System with Dead Time (지연요소를 수반하는 일차계통의 패러미터 추정에 관한 연구)

  • Joo Shik Ha
    • 전기의세계
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    • v.18 no.1
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    • pp.15-23
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    • 1969
  • A lot of recent researches have shown that a Pseudo Random Binary Signal is a quite effective test signal to measure the impulse response of a plant. Generally speaking, however, such a response itself is not satisfactory to determine the appropriate control parameters or control inputs. Here, the author intends to estimate the unknown parameters of the First Order Plant with Dead Time by means of correlation method using M-sequence signal. The time constant T and the dead time L of the plant are eatimated with one tracking loop by automatically adjusting delay time .tau. of M-sequence signal according to variations of T and L. In this paper, a three level M-sequence signal is used as a test signal in order to avoid troublesome operations to calculate partial derivatives of a given performance index with respect to the parameters which are usually required in the Model Method. Several experiments with analogue computer using low pass filters as averaging circuits showed good results as expected.

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Sensing of Three Phase PWM Voltages Using Analog Circuits (아날로그 회로를 이용한 3상 PWM 출력 전압 측정)

  • Jou, Sung-Tak;Lee, Kyo-Beum
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.11
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    • pp.1564-1570
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    • 2015
  • This paper intends to suggest a sensing circuit of PWM voltage for a motor emulator operated in the inverter. In the emulation of the motor using a power converter, it is necessary to measure instantaneous voltage at the PWM voltage loaded from the inverter. Using a filter can generate instantaneous voltage, while it is difficult to follow the rapidly changing inverter voltage caused by the propagation delay and signal attenuation. The method of measuring the duty of PWM using FPGA can generate output voltage from the one-cycle delay of PWM, while the cost of hardware is increasing in order to acquire high precision. This paper suggests a PWM voltage sensing circuit using the analogue system that shows high precision, one-cycle delay of PWM and low-cost hardware. The PWM voltage sensing circuit works in the process of integrating input voltage for valid time by comparing levels of three-phase PWM input voltage, and produce the output value integrated at zero vector. As a result of PSIM simulation and the experiment with the produced hardware, it was verified that the suggested circuit in this paper is valid.