• Title/Summary/Keyword: back-lapping

Search Result 6, Processing Time 0.027 seconds

The Effect of Dual Wafer Back-Lapping Process on Flexural Strength of Semiconductor Chips (웨이퍼의 2단 이면공정이 반도체 칩의 휨 강도에 미치는 영향)

  • Lee Seong Min
    • Korean Journal of Materials Research
    • /
    • v.15 no.3
    • /
    • pp.183-188
    • /
    • 2005
  • It was studied in this article how the flexural strength of bare silicon chips is influenced by adopting dual wafer back-lapping process. The experimental results showed that an additional finishing process after the conventional grinding process improves the flexural strength of bare chips by more than 2-fold. In particular, this work showed that the proper removal of the grinding marks$(Ra=0.1\;{\mu}m)$existing on the wafer back-surface resulting from the grinding process significantly contiributes to the enhancement of chip strength.

Evaluation of Grinding Characteristics in Radial Direction of Silicon Wafer (실리콘 웨이퍼의 반경 방향에 따른 연삭 특성 평가)

  • Kim, Sang-Chul;Lee, Sang-Jik;Jeong, Hae-Do;Lee, Seok-Woo;Choi, Heon-Jong
    • Proceedings of the KSME Conference
    • /
    • 2003.04a
    • /
    • pp.980-986
    • /
    • 2003
  • As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive, the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, Ist, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the effect of the wheel path density and relative velocity on the characteristic of ground wafer in in-feed grinding with cup-wheel. It seems that the variation of the parameters in radial direction of wafer results in the non-uniform surface quality over the wafer. So, in this paper, the geometric analysis on grinding process is carried out, and then, the effect of the parameters on wafer surface quality is evaluated

  • PDF

Profile Simulation in Mono-crystalline Silicon Wafer Grinding (실리콘 웨이퍼 연삭의 형상 시뮬레이션)

  • Kim Sang Chul;Lee Sang Jik;Jeong Hae Do;Choi Heon Zong;Lee Seok Woo
    • Journal of the Korean Society for Precision Engineering
    • /
    • v.21 no.10
    • /
    • pp.26-33
    • /
    • 2004
  • Ultra precision grinding technology has been developed from the refinement of the abrasive, the development of high stiffness equipment and grinding skill. The conventional wafering process which consists of lapping, etching, 1 st, 2nd and 3rd polishing has been changed to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Furthermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focuses on the flatness of the ground wafer. Generally, the ground wafer has concave pronto because of the difference of wheel path density, grinding temperature and elastic deformation of the equipment. Wafer tilting is applied to avoid non-uniform material removal. Through the geometric analysis of wafer grinding process, the profile of the ground wafer is predicted by the development of profile simulator.

Profile Simulation in Mono-crystalline Silicon Wafer Grinding (실리콘 웨이퍼 연삭의 형상 시뮬레이션)

  • 김상철;이상직;정해도;최헌종;이석우
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2003.06a
    • /
    • pp.98-101
    • /
    • 2003
  • As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive. the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, 1st, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the flatness of the ground wafer. Generally, the ground wafer has concave profile because of the difference of wheel path density, grinding temperature and elastic deformation of the equiptment. Tilting mathod is applied to avoid such non-uniform material removes. So, in this paper, the geometric analysis on grinding process is carried out, and then, we can predict the profile of th ground wafer by using profile simulation.

  • PDF

The Fabrication of (Ga, Al) As/GaAs Modified Multi-Quantum Well Laser Diode by MOCVD (MOCVD법에 의한 (Ga, Al) As/GaAs 변형된 영지우물 레이저 다이오드의 제작)

  • Kim, Chung-Jin;Kang, Myung-Ku;Kim, Yong;Eom, Kyung-Sook;Min, Suk-Ki;Oh, Hwan-Sool
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.29A no.9
    • /
    • pp.36-45
    • /
    • 1992
  • The Modified Multi-Quantum Well(MMQWAl) structures have been grown by Mental-Organic chemical Vapor Deposition(MOCVD) method and stripe type MMQW laser diodes have been investigated. In the case of GaAs/AlGaAs superlattice and quantum well growth by MOCVD, the periodicity, interface abruptess, Al compositional uniformity and layer thickness have been confirmed though the shallow angle lapping technique, double crystal x-ray diffractometry (DCXD) and photoluminescence (PL) measurement. stripe-type MMQW laser diodes have been fabricated using the process technology of photolithography, chemical etching, ohmic contact, back side removing and cleaving. As the result of the electrical and opticalmeasurement of these laser diodes, we have achieved the series resistance of $1[\Omega}~2{\Omega}$ by current-voltage measurements, the threshold current of 200-300mA by currnt-light measurements and the lasing wavelength of 8000-8400$\AA$ by lasing spectrum measurements.

  • PDF

AlGaAs/InGaAs/GaAs PHEMT power PHEMT with a 0.2 ${\mu}{\textrm}{m}$ gate length for MIMIC power amplifier. (MIMIC 전력증폭기에 응용 가능한 0.2 ${\mu}{\textrm}{m}$ 이하의 게이트 길이를 갖는 전력용 AlGaAs/InGaAs/GaAs PHEMT)

  • 이응호
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.27 no.4B
    • /
    • pp.365-371
    • /
    • 2002
  • In this paper, the fabricated power PHEMT devices for millimeter-wave that is below a gate-length of 0.2 $\mu\textrm{m}$ using electronic beam lithography technologies, and the DC and frequency characteristics and an output power characteristics were Measured at the various bias conditions. The unit process that is used in PHEMT's manufacture used that low-resistance ohmic contact, air-bridge and back-side lapping process technologies, and so on. The fabricated power PHEMT have an S521 gain of 4 dB and a maximum transconductance(gm) of 317 mS/mm, an unilateral current gain(fT) of 62 GHz, a maximum oscillation frequency(fmax) of 120 GHz at 35 GHz, and a maximum power output(Pmax) of 16 dBm, a power gain(GP) of 4 dB and a drain efficiency(DE) of 35.5 %.