• Title/Summary/Keyword: block processing

Search Result 1,475, Processing Time 0.031 seconds

Design of modified Feistel structure for high-capacity and high speed achievement (대용량 고속화 수행을 위한 변형된 Feistel 구조 설계에 관한 연구)

  • Lee Seon-Keun;Jung Woo-Yeol
    • Journal of the Korea Society of Computer and Information
    • /
    • v.10 no.3 s.35
    • /
    • pp.183-188
    • /
    • 2005
  • Parallel processing in block cryptographic algorithm is difficult, because Feistel structure that is basis structure of block cryptographic algorithm is sequential processing structure. Therefore this paper changes these sequential processing structure and Feistel structure made parallel processing to be possible. This paper that apply this modified structure designed DES that have parallel Feistel structure. Proposed parallel Feistel structure could prove greatly block cryptographic algorithm's performance such as DES and so on that could not but have trade-off relation the data processing speed and data security interval because block cryptographic algorithm can not use pipeline method because of itself structural problem. Therefore, modified Feistel structure is going to display more superior security function and processing ability of high speed than now in case apply way that is proposed to SEED, AES's Rijndael, Twofish etc. that apply Feistel structure.

  • PDF

Frequency-Domain RLS Algorithm Based on the Block Processing Technique (블록 프로세싱 기법을 이용한 주파수 영역에서의 회귀 최소 자승 알고리듬)

  • 박부견;김동규;박원석
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 2000.10a
    • /
    • pp.240-240
    • /
    • 2000
  • This paper presents two algorithms based on the concept of the frequency domain adaptive filter(FDAF). First the frequency domain recursive least squares(FRLS) algorithm with the overlap-save filtering technique is introduced. This minimizes the sum of exponentially weighted square errors in the frequency domain. To eliminate discrepancies between the linear convolution and the circular convolution, the overlap-save method is utilized. Second, the sliding method of data blocks is studied Co overcome processing delays and complexity roads of the FRLS algorithm. The size of the extended data block is twice as long as the filter tap length. It is possible to slide the data block variously by the adjustable hopping index. By selecting the hopping index appropriately, we can take a trade-off between the convergence rate and the computational complexity. When the input signal is highly correlated and the length of the target FIR filter is huge, the FRLS algorithm based on the block processing technique has good performances in the convergence rate and the computational complexity.

  • PDF

A Design and Implementation of Real-time Video frame data Processing control for Block Matching Algorithm (고속블럭정합 알고리즘을 위한 실시간 영상프레임 데이터 처리 제어 방법의 설계 및 구현)

  • 이강환;황호정
    • Proceedings of the IEEK Conference
    • /
    • 2001.06b
    • /
    • pp.373-376
    • /
    • 2001
  • This paper has been studied a real-time video frame data processing control that used the linear systolic array for motion estimation. The proposed data control processing provides to the input data into the multiple processor array unit(MPAU) from search area and reference block data. The proposed data control architecture has based on two slice band for input data processing. And it has no required external control logic blocks for input data as like reference block or search area data.

  • PDF

Joint Overlapped Block Motion Compensation Using Eight-Neighbor Block Motion Vectors for Frame Rate Up-Conversion

  • Li, Ran;Wu, Minghu;Gan, Zongliang;Cui, Ziguan;Zhu, Xiuchang
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • v.7 no.10
    • /
    • pp.2448-2463
    • /
    • 2013
  • The traditional block-based motion compensation methods in frame rate up-conversion (FRUC) only use a single uniquely motion vector field. However, there will always be some mistakes in the motion vector field whether the advanced motion estimation (ME) and motion vector analysis (MA) algorithms are performed or not. Once the motion vector field has many mistakes, the quality of the interpolated frame is severely affected. In order to solve the problem, this paper proposes a novel joint overlapped block motion compensation method (8J-OBMC) which adopts motion vectors of the interpolated block and its 8-neighbor blocks to jointly interpolate the target block. Since the smoothness of motion filed makes the motion vectors of 8-neighbor blocks around the interpolated block quite close to the true motion vector of the interpolated block, the proposed compensation algorithm has the better fault-tolerant capability than traditional ones. Besides, the annoying blocking artifacts can also be effectively suppressed by using overlapped blocks. Experimental results show that the proposed method is not only robust to motion vectors estimated wrongly, but also can to reduce blocking artifacts in comparison with existing popular compensation methods.

Smoke Detection Method of Color Image Using Object Block Ternary Pattern (물체 블록의 삼진 패턴을 이용한 컬러 영상의 연기 검출 방법)

  • Lee, Yong-Hun;Kim, Won-Ho
    • Journal of Satellite, Information and Communications
    • /
    • v.9 no.4
    • /
    • pp.1-6
    • /
    • 2014
  • Color image processing based on smoke detection is suitable detecting target to early detection of fire smoke. A method for detecting the smoke is processed in the pre-processing movement and color. And Next, characteristics of smoke such as diffusion, texture, shape, and directionality are used to post-processing. In this paper, propose the detection method of density distribution characteristic in characteristics of smoke. the generate a candidate regions by color thresholding image in Detecting the movement of smoke to the 10Frame interval and accumulated while 1second image. then check whether the pattern of the smoke by candidate regions to applying OBTP(Object Block Ternary Pattern). every processing is Block-based processing, moving detection is decided the candidate regions of the moving object by applying an adaptive threshold to frame difference image. The decided candidate region accumulates one second and apply the threshold condition of the smoke color. make the ternary pattern compare the center block value with block value of 16 position in each candidate region of the smoke, and determine the smoke by compare the candidate ternary pattern and smoke ternary pattern.

Dynamic Block Reassignment for Load Balancing of Block Centric Graph Processing Systems (블록 중심 그래프 처리 시스템의 부하 분산을 위한 동적 블록 재배치 기법)

  • Kim, Yewon;Bae, Minho;Oh, Sangyoon
    • KIPS Transactions on Software and Data Engineering
    • /
    • v.7 no.5
    • /
    • pp.177-188
    • /
    • 2018
  • The scale of graph data has been increased rapidly because of the growth of mobile Internet applications and the proliferation of social network services. This brings upon the imminent necessity of efficient distributed and parallel graph processing approach since the size of these large-scale graphs are easily over a capacity of a single machine. Currently, there are two popular parallel graph processing approaches, vertex-centric graph processing and block centric processing. While a vertex-centric graph processing approach can easily be applied to the parallel processing system, a block-centric graph processing approach is proposed to compensate the drawbacks of the vertex-centric approach. In these systems, the initial quality of graph partition affects to the overall performance significantly. However, it is a very difficult problem to divide the graph into optimal states at the initial phase. Thus, several dynamic load balancing techniques have been studied that suggest the progressive partitioning during the graph processing time. In this paper, we present a load balancing algorithms for the block-centric graph processing approach where most of dynamic load balancing techniques are focused on vertex-centric systems. Our proposed algorithm focus on an improvement of the graph partition quality by dynamically reassigning blocks in runtime, and suggests block split strategy for escaping local optimum solution.

An Efficient Block Cipher Implementation on Many-Core Graphics Processing Units

  • Lee, Sang-Pil;Kim, Deok-Ho;Yi, Jae-Young;Ro, Won-Woo
    • Journal of Information Processing Systems
    • /
    • v.8 no.1
    • /
    • pp.159-174
    • /
    • 2012
  • This paper presents a study on a high-performance design for a block cipher algorithm implemented on modern many-core graphics processing units (GPUs). The recent emergence of VLSI technology makes it feasible to fabricate multiple processing cores on a single chip and enables general-purpose computation on a GPU (GPGPU). The GPU strategy offers significant performance improvements for all-purpose computation and can be used to support a broad variety of applications, including cryptography. We have proposed an efficient implementation of the encryption/decryption operations of a block cipher algorithm, SEED, on off-the-shelf NVIDIA many-core graphics processors. In a thorough experiment, we achieved high performance that is capable of supporting a high network speed of up to 9.5 Gbps on an NVIDIA GTX285 system (which has 240 processing cores). Our implementation provides up to 4.75 times higher performance in terms of encoding and decoding throughput as compared to the Intel 8-core system.

Reliability-Based Deblocking Filter for Wyner-Ziv Video Coding

  • Dinh, Khanh Quoc;Shim, Hiuk Jae;Jeon, Byeungwoo
    • IEIE Transactions on Smart Processing and Computing
    • /
    • v.5 no.2
    • /
    • pp.129-142
    • /
    • 2016
  • In Wyner-Ziv coding, video signals are reconstructed by correcting side information generated by block-based motion estimation/compensation at the decoder. The correction is not always accurate due to the limited number of parity bits and early stopping of low-density parity check accumulate (LDPCA) decoding in distributed video coding, or due to the limited number of measurements in distributed compressive video sensing. The blocking artifacts caused by block-based processing are usually conspicuous in smooth areas and degrade the perceptual quality of the reconstructed video. Conventional deblocking filters try to remove the artifacts by treating both sides of the block boundary equally; however, coding errors generated by block-based processing are not necessarily the same on both sides of the block boundaries. Such a block-wise difference is exploited in this paper to improve deblocking for Wyner-Ziv frameworks by designing a filter where the deblocking strength at each block can be non-identical, depending on the reliability of the reconstructed pixels. Test results show that the proposed filter not only improves subjective quality by reducing the coding artifacts considerably, but also gains rate distortion performance.

FRACTAL CODING OF VIDEO SEQUENCE USING CPM AND NCIM

  • Kim, Chang-Su;Kim, Rin-Chul;Lee, Sang-Uk
    • Proceedings of the Korean Society of Broadcast Engineers Conference
    • /
    • 1996.06b
    • /
    • pp.72-76
    • /
    • 1996
  • We propose a novel algorithm for fractal video sequence coding, based on the circular prediction mapping (CPM), in which each range block is approximated by a domain block in the circularly previous frame. In our approach, the size of the domain block is set to be same as that of the range block for exploiting the high temporal correlation between the adjacent frames, while most other fractal coders use the domain block larger than the range block. Therefore the domain-range mapping in the CPM is similar to the block matching algorithm in the motion compensation techniques, and the advantages of this similarity are discussed. Also we show that the CPM can be combined with non-contractive inter-frame mapping (NCIM), improving the performance of the fractal sequence coder further. The computer simulation results on real image sequences demonstrate that the proposed algorithm provides very promising performance at low bit-rate, ranging from 40 Kbps to 250 Kbps.

  • PDF

TCP Engine Design for TCP/IP Hardware Accelerator (TCP/IP Hardware Accelerator를 위한 TCP Engine 설계)

  • 이보미;정여진;임혜숙
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.5B
    • /
    • pp.465-475
    • /
    • 2004
  • Transport Control Protocol (TCP) has been implemented in software running on CPU in end systems, and the protocol processing has appeared as a new bottleneck due to advanced link technology. TCP processing is a critical issue in Storage Area Network (SAN) such as iSCSL, and the overall performance of the Storage Area Network heavily depends on speed of TCP processing. TCP Engine implemented in hardware reduces the load of CPU in end systems as well as accelerates the protocol processing, and hence high speed data processing is achieved. In this paper, we have proposed a hardware engine for TCP processing. TCP engine consists of three major block, TCP Connection block Rx TCP block and Tx TCP block TCP Connection block is responsible for managing TCP connection states. Rx TCP block is responsible for receive flow which receives packets from network and sends to CPU. Rx TCP performs header and data processing and sends header information to TCP connection block and Tx TCP block It also assembles out-of-ordered data to in-ordered before it transfers data to CPU. Tx TCP block is responsible for transmit flow which transfers data from CPU to network. Tx TCP performs retransmission for reliable data transfer and management of transmit window and sequence number. Various test-cases are used to verify the TCP functions. The TCP Engine is synthesized using 0.18 micron technology and results in 51K gates not including buffers for temporal data storage.