• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.13 no.5
• /
• pp.49-54
• /
• 2013

We designed a burst mode optical receiver for 1.25Gbps PON(Passive Optical Network), fabricated it using $0.8{\mu}m$ BiCMOS foundry. We minimized the loss of the data in the front of the burst by reducing AGC(Automatic Gain Control) signal generation time using an exponential amplifier. We confirmed that AGC of the burst mode optical receiver functioned well and showed good performance in measurement. However, although the eye of the eye pattern was opened the jitter characteristic was deteriorated due to the heavy waveform distortion.

• Journal of the Optical Society of Korea
• /
• v.12 no.4
• /
• pp.355-358
• /
• 2008

In the current GPON market and standard, the line bit rate requirement is changing from 1.25 Gbps to 2.5 Gbps. We fabricate a 2.5 Gbps burst-mode receiver with commercially available blocks and optimize it with an APD bias control. A burst-mode measurement setup is made for the full compliance test with the GPON standard. The device meets the partially defined 2.5 Gbps specs in the current ITU G.984.2 standard, also, supports 1.25 Gbps specs for the coexistence issue in an access network. The full-compliant measurement values can be used as a guideline for fixing "for further study" specs in the current GPON standard at 2.5 Gbps.

• ETRI Journal
• /
• v.31 no.5
• /
• pp.622-624
• /
• 2009

This letter presents a compact 2.5 Gb/s burst-mode receiver using the first reported monolithic amplifier IC developed with 0.25 ${\mu}m$ SiGe BiCMOS technology. With optimum avalanche photodiode gain, the receiver module can obtain a fast response, high sensitivity and wide dynamic range, satisfying the overhead timing and various power specifications for a 2.5 Gb/s next-generation passive optical network (PON), as well as a legacy 1.25 Gb/s PON in the upstream.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.5 no.7
• /
• pp.1219-1225
• /
• 2001

In this Paper we describe the design of synchronization algorithms for burst QPSK receiver, which are applicable to BWLL uplink. The demodulator consists of digital down converter, matched filter and synchronization circuits. For symbol timing recovery we ufo Gardner algorithm. And we use forth power method and decision directed method for carrier frequency recovery and phase recovery, respectively. For the sake of performance analysis, we compare simulation results with the board implemented by FPGA which is APEX20KE series chip for Alter. The performance results show it works quite well up to the condition that a frequency offset equal to 4.7% of symbol rate.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
• /
• 2001.11a
• /
• pp.44-48
• /
• 2001

In this paper we describe the design of symbol timing and carrier synchronization algorithms for burst receiver. The demodulator consists of digital down converter, matched filter and synchronization circuits. For symbol timing recovery we use modified Gardner algorithm. And we use decision directed method for carrier phase recovery. For the sake of performance analysis, we compare simulation results with the board implemented by FPGA which is APEX20KE series chip for Alter. The performance results show it works quite well up to the condition that a frequency offset equal to 0.1% of symbol rate.

• Korean Journal of Optics and Photonics
• /
• v.19 no.5
• /
• pp.343-348
• /
• 2008

This study was carried out to commercialize FTTH by developing a burst mode optical receiver for E-PON. The optical receiver was manufactured by minimizing the capacitance of a photodiode to improve sensitivity for meeting 10, 20 km OLT Rx standard of E-PON at the transmission speed of 1.25 Gb/s. When bit-error ratio is $10^{-12}$ and PRBS is $2^5-1$, sensitivity is -26 dBm, loud/soft ratio is 23 dB. Both preamble time and guard time were set to 102.4 ns (128 bit). After comparing a photodiode whose capacitance is 0.53 pF with another photodiode whose capacitance has been minimized to 0.26 pF, we could see that sensitivity improved to 0.7 dBm and so did bandwidth to 190 MHz of burst mode for the optical receiver manufactured by the photodiode whose capacitance is 0.26 pF.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
• /
• v.4 no.2
• /
• pp.29-36
• /
• 2005

All-optical fiber-type $2{\times}32$ splitters for an Ethernet PON (passive optical network) were fabricated by using a FBT (fiber biconical tapered) process and the performance of the splitters was tested in upstream transmission of the EPON system. The $2{\times}32$ splitters was obtained by cascading $1{\times}4$ splitters fabricated by a conventional FBT process and showed -18 dB of insertion loss with 1.5 dB uniformity of output power at each channel and -0.1 dB of polarization dependent loss. The insertion loss variation was below 0.1 dB at the temperature range of $-40^{\circ}C\;to\;80^{\circ}C$. For upstream channel transmission test in the EPON system were a Zig board and a burst mode receiver. Zenko-made optical module was used for the burst mode receiver by adding functions of serializer/deserializer and clock data recovery, a Virtex II pro20 chipset and Vitesse VSC7123 were used in the Zig board for characterizing the burst mode and in the clock data recovery chipset, respectively. Startup acquisition lock time and data acquisition lock time were measured to be 670ns and 400ns, respectively, in the upstream channel transmission of the EPON system adapting the $2{\times}32$ splitter fabricated in this work.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2003.10a
• /
• pp.283-286
• /
• 2003

In this paper, we represent an implementation of burst QPSK receiver for underwater acoustic communication. Transmitter sends 5,000 symbols at 25kHz frequency with 200 kHz D/A sampling rate. The received signal is sampled at 100 kHz. Implemented receiver acquires the frame synchronization, coarse symbol timing estimate, and coarse phase offset estimate using 32 symbol length preamble. The estimated phase offset is used to initiate of 2nd order PLL. The transmission experiment results show that PLL is a mandatory to compensate Doppler shift due to the variation of tidal current.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.7C
• /
• pp.706-714
• /
• 2009

In this paper, we proposed a burst mode AGC loop and preamble detector applicable for VDL(VHF Digital Link) mode-2 using D8PSK modulation scheme and the performance analysis of proposed schemes is described. Generally the AGC scheme can be divided into two types, continuos and burst mode AGC. The continuos mode is performed well only with an analog feedback AGC loop. But the analog feedback AGC loop is not suitable for burst mode since its gain lock time is more than preamble duration, which causes the preamble detector misses preamble. Hence a fast digital AGC loop is required for burst mode. Also the AGC loop has to be designed with full gain during idle time to detect bursts although the signal level is very low. If the time to acquire gain lock is slow, the preamble detector fail to detect burst due to saturation of a lot of preamble samples. The receiver performance might be down even if the burst was detected because the preamble is used to estimate several parameters need to demodulation at receiver. In this paper we analysed relationships between the AGC loop and preamble detector. we present an AGC loop and preamble detector in burst mode.

• The Journal of the Acoustical Society of Korea
• /
• v.24 no.8
• /
• pp.462-468
• /
• 2005

In this paper, we present a frame synchronization scheme for high oversampling rate based QPSK receiver system in the underwater acoustic burst transmission. The proposed frame synchronization scheme determines the frame synchronization by comparing a threshold value with the correlation between the received symbol sequence and rotated 16-symbol length CAZAC sequence, which is made by dividing into two 8-symbol length sequences and then concatenating the latter sequence and the former one. If the correlation value is bigger than the threshold value, the frame detector determines that the frame synchronization is achieved at that sample. Also, the approximated performance of designed frame detector is derived and it is well fit the simulated result.