• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2007.10a
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• pp.262-265
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• 2007

Cooling circuit of injection mold affects part quality and cycle time of injection molding process. Examination on mold cooling circuit is usually omitted in part design stage because cooling circuit is designed in the mold design stage. It is desirable to examine mold cooling circuit with respect to part quality in the part design stage. In order to make the examination process convenient and fast, cooling circuit design should be automated without intervention of skilled designer. In this study, optimization of cooling circuit design is automated with commercial softwares; Visual DOC and Moldflow MPI. Effect of initial value for optimization is examined for the optimization result.

• Journal of Applied Reliability
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• v.16 no.4
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• pp.331-337
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• 2016

Purpose: The purpose of this study is the analysis of the failure mechanisms effect of circuit design characteristics of the ballast for LED Lamp Methods: Recently, electronic circuit of ballasts for LED lamp are being occurred on various failure mechanisms (whiskers, ion migration, heat dissipation problem, switching element damage) because electronic ballast circuit design characteristics are becoming more and more diverse. Results: we analysis failure mechanisms that occurs in accordance with the circuit design characteristics The ballast for LED lamp were divided into three different types (Type A, Type B, Type C) considering circuit design characteristics (thermal design, PCB patten spacing, element material) and it was experimented in the acceleration test conditions ($85^{\circ}C$, 85% R.H). Conclusion: We confirmed that failure mechanism of the ballast for LED Lamp had occurred differently in accordance with the circuit design characteristics.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.7
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• pp.20-29
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• 1998

As the packing density of ICs in recent submicron IC design increases, interconnects gain importance. Because interconnects directly affect on two major components of circuit performance, power dissipation and operating speed, circuit engineers are concerned with the optimal design of interconnects and the aid tool to design them. When circuit models of interconnects are given (including geometry and material information), the analysis process for the given structure is not an easy task, but conversely, it is much more difficult to design an interconnect structure with given circuit characteristics. This paper focuses on the latter process that has not been foucsed on much till now due to the complexity of the problem, and prsents a design aid tool(DATOIS) to synthesize interconnects. this tool stroes the circuit performance parameters for normalized interconnect geometries, and has two oeprational modes:analysis mode and synthesis mode. In the analysis mode, circuit performance parameters are obtained by searching the internal database for a given geometry and interpolates results if necessary . In thesynthesis mode, when a given circuit performance parameter satisfies a set of geometry condition in the database, those geometry structures are printed out.

• 전기의세계
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• v.24 no.5
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• pp.72-80
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• 1975

In this paper an application of the Monte Carlo method to optimum circuit design is discussed. T. Tsuda and T. Kiyono's algorithm based on the Monte Carlo method for solving multiple simul-taneous nonlinear equations is generalized to apply it to finding solutions of the constrained nonlinear optimization problem. The generalized algorithm derived here is directly applied to economical circuit design. In the cirsuit design, the object function is a cost function which is related to the cost of each circuit component. The constraint is the variance of the total system expressed by the variances of each circuit component. The design is to be determined so that the circuit has specified drift reliability with minimum cost. A practical example of economical circuit design and a general nonlinear function minimization is presented with food results.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.419-422
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• 2004

A sensing scheme for current-mode magneto-resistance random access memory (MRAM) with a 1T1MTJ cell structure is proposed. Magnetic tunnel junction (MTJ) resistance, which is HIGH or LOW, is converted to different cell currents during READ operation. The cell current is then amplified to be evaluated by the reference cell current. In this scheme, conventional bit line sense amplifiers are not required and the operation is less sensitive to voltage noise than that of voltage-mode circuit is. It has been confirmed with HSPICE simulations using a 0.35-${\mu}m$ 2-poly 4-metal CMOS technology.

• Proceedings of the KSME Conference
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• 2001.06b
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• pp.476-481
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• 2001

In this paper, based on the developed dynamic model of a vacuum circuit breaker mechanism, the development of the new circuit breaker with less energy mechanism is focused. The energy flow analysis of the original mechanism is carried out to show where the elastic potential energies of pre-loaded springs are transmitted. Through energy flow analysis, the concept design of the new circuit breaker with less energy mechanism is proposed, and then the detailed design is carried out through the design process based on the verified dynamic model. Comparing simulation results with experiment using a high-speed camera, the appropriateness of the proposed design procedures for the rapid circuit breaker mechanism is shown.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.3
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• pp.517-526
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• 1987

This paper proposes a new testable design for Zipper CMOS circuits. This design provides an additional feedback loop (called self oscillation loop) whichin the circuit, for testability. The circuit is tested only by observing the oscillation on the loop. The design can be applied to the multistage as well as the single stage, and can detect multiple faults which are undetectable by the conventional testing method. The application and evaluation of test patterns become easy and fault-free responses are not necessary. If the conventional testing method is applied to the sequential Zipper CMOS circuit with the LSSD design technique, it has the serious defect that the initial value may change due to intermediate test patterns and much time taken to apply the necessary test patterns. By using the proposed design, however, the sequential Zipper CMOS circuit with the LSSD design technique can be easily tested without such a defect. Also, the validity of the design is verified by performing the circuit level simulation.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.89-94
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• 2009

This paper proposes the algorithms that design the highly digital logic circuit and assign the code to each node of DCG(Directed Cyclic Graph) of length ${\zeta}$. The conventional algorithm have some problems, so this paper introduce the matrix equation from DCG of length ${\zeta}$ and proposes highly digital logic circuit design algorithms according to the DCG of length ${\zeta}$. Using the proposed circuit design algorithms in this paper, it become realized that was able to design from former algorithm. Also, making a comparison between the circuit using former algorithm and this paper's, we testify that proposed paper's algorithm is able to realize more optimized circuit design. According to proposed circuit design algorithm in this paper, it is possible to design current that DCG have natural number, so it have the following advantages, reduction of the circuit input/output digits, simplification of circuit composition, reduction of computation time and cost. And we show comparability and verification about this paper's algorithm.

• Journal of the Korea Institute of Military Science and Technology
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• v.25 no.5
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• pp.545-551
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• 2022

We proposed a design method for constant current pyro squib circuit. The current method using N MOSFET for the stability problem has a weakness of the current change, requiring a new design. This paper identified the problem with conventional squib circuit where the current is reduced by 25 % when maximum resistance is 3 ohms. Thus, we proposed a stable constant current driving circuit using P MOSFET and PNP BJT. We confirmed stable constant circuit operation through simulations and measurements of the proposed circuit design where the current did not change until the resistance reached 3 ohms.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.1418-1421
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• 2003

The Vacuum circuit breaker is a kind of power circuit breaker and protect electric devices from over-current. In this paper we built a dynamic model of VCB driving mechanism using ADAMS. The development of the new circuit breaker with less energy and more compactable mechanism is focused. Through the dynamic model, the concept design of the new circuit breaker with less energy and more compactable mechanism is proposed, and then the detailed design is carried out through the design process based on the dynamic model.