• 제목/요약/키워드: density-delay time

검색결과 137건 처리시간 0.023초

전해연마 용액에서 안정화 시간과 표면 거칠기에 따른 오스테나이트 스테인리스강의 전기화학적 특성 (Electrochemical Properties of Austenitic Stainless Steel with Initial Delay Time and Surface Roughness in Electropolishing Solution)

  • 황현규;김성종
    • Corrosion Science and Technology
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    • 제21권2호
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    • pp.158-169
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    • 2022
  • The objective of this study was to investigate the electrochemical behavior and damage degree of metal surface under different conditions by performing a potentiodynamic polarization experiment using an electropolishing solution for UNS S31603 based on initial delay time and surface roughness (parameters). A second anodic peak occurred at initial delay time of 0s and 100s. However, it was not discovered at 1000s and 3600s. This research referred to an increase in current density due to hydrogen oxidation reaction among various hypotheses for the second anodic peak. After the experiment, both critical current density and corrosion current density decreased when the initial delay time (immersion time) was longer. As a result of surface analysis, characteristics of the potentiodynamic polarization behavior were similar with roughness, although the degree of damage was clearly different. With an increase in surface roughness value, the degree of surface damage was precisely observed. As such, electrochemical properties were different according to the immersion time in the electropolishing solution. To select electropolishing conditions such as applied current density, voltage, and immersion time, 1000s for initial delay time on the potentiodynamic polarization behavior was the most appropriate in this experiment.

시계열 수문자료의 비선형 상관관계 (How to Measure Nonlinear Dependence in Hydrologic Time Series)

  • 문영일
    • 한국수자원학회논문집
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    • 제30권6호
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    • pp.641-648
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    • 1997
  • 상관계수가 변수간의 선형 상관관계를 나타내듯이 mutual information은 변수간의비선형 상관관계를 나타내준다. 본 논문에서는 mutual information 추정법으로 다변수 핵 미도함수(multivariate kernel density estimator)를 이용한 방법이 여러 time lags값에 대하여 산정 되었다. 많은 수문자료에서 보여지는 비선형 관계를 Mutual Information으로 확인하여 보았고, 또한 Mutual Information값이 거의 0인 점에서 optimal delay time을 구하여, 하나의 자료로부터 다변수 회귀분석 모델을 만들 때 이용할 수 있다.

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The Impact of Delay Optimization on Delay fault Testing Quality

  • Park, Young-Ho;Park, Eun-Sei
    • Journal of Electrical Engineering and information Science
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    • 제2권3호
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    • pp.14-21
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    • 1997
  • In delay-optimized designs, timing failures due to manufacturing delay defects are more likely to occur because the average timing slacks of paths decrease and the system becomes more sensitive to smaller delay defect sizes. In this paper, the impact of delay optimized logic circuits on delay fault testing will be discussed and compared to the case for non-optimized designs. First, we provide a timing optimization procedure and show that the resultant density function of path delays is a delta function. Next we also discuss the impact of timing optimization on the yield of a manufacturing process and the defect level for delay faults. Finally, we will give some recommendations on the determination of the system clock time so that the delay-optimized design will have the same manufacturing yield as the non-optimized design and on the determination of delay fault coverage in the delay-optimized design in order to have the same defect-level for delay faults as the non-optimized design, while the system clock time is the same for both designs.

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지연제로서 전분이 시멘트혼합토에 미치는 영향 (The Effects of Starch as a Retarder in Soil Cement Mixtures)

  • 김재영
    • 한국농공학회지
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    • 제18권3호
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    • pp.4163-4170
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    • 1976
  • This study was conducted to investigate the effect of starch as a retarder on the maximum dry density and the unconfined compressive strength of soil cement mixtures for varied starch contents (0-3%), cement contents (3-12%), and delay times (0-6hrs) in four soils. The experimental results obtained from maximum dry density and unconfined compressive strength tests are as follows: 1. Maximum dry density and unconfined compressive strength were increased greatly in soil cement mixtues rwhen starch was added as retarder but their value schanged according to soil varieties. 2. Maximum dry density showed at about 0.5 percent to 1.0 percent of starch in KY soil and about 2.0 percent to 2.5 percent in SS soil when delay time was changed in 2.4, and 6 hours in compaction test. 3. The larger content of cement was, the bigger effects of maximum dry density and compressive strength were in soil cement. mixtures. 4. As delay time changed 2.4, and 6 hours in compaction test, 7-day unconfined compressive strength showed the biggest value at about 0.5 percent of starch in KY soil and 2.0 percent in SS soil, and the maximum value of 28-day unconfined compressive strength showed at about 0.5 percent in KY soil and 1.5 percent in SS soil.

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지연다짐이 Soil-Cement의 압축강도에 미치는 영향 (The Effect of Delayed Compaction on Unconfined Compressive Strength of Soil-Cement Mixtures)

  • 정일웅;김문기;도덕현
    • 한국농공학회지
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    • 제28권4호
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    • pp.66-76
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    • 1986
  • This study was attempted to investigate the effects of delayed compaction on the unconfined compressive strengh and dry density of Soil-cement mixtures. Soil-cement construction is a time-consuming procedure. Time-delay is known as a detrimental factor to lower the quality of soil-cement layer. A laboratory test was performed using coarse and fine weathered granite soils. The soils were mixed with 7% cement at optimum moisture content and excess moisture content in part. Socondary additives such as lime, gypsum-plaster, flyash and sugar were tried to counteract the detri-mental effect of delayed compaction. The specimens were compacted by Harvard Miniature Compaction Apparatus at 0,1,2,4,6 hors after mixing. Two kinds of compactive efforts(9 kgf and 18 kgf tamper) were applied. The results were summarized as follows: 1.With the increase of time delay, the decrease rate of dry density of the specimen compacted by 9 kgf tamper was steeper than that of the specimen compacted by 18kgf tamper. In the same manner, soil-B had steeper decreasing rate of dry density than soil-A. 2.Based on the results of delayed compaction tests, the dry density and unconfined compressive sterngth were rapidly decreased in the early 2 hours delay, while those were slowly decreased during the time delay of 2 to 6 hours. 3.The dry density and unconfined compressive strength were increased by addition of 3% excess water to the optimum moisture content during the time delay of 2 to 6 hours. 4.Without time delay in compaction, the dry densities of soil-A were increased by adding secondary additives such as lime, gypsum-plaster, flyash and sugar, on the other hand, those of soil-B were decreased except for the case of sugar. 5.The use of secondary additives like lime, gypsum-plaster, flyash and sugar could reduce the decrease of unconfined compressive strength due to delayed compaction. Among them, lime was the most effective. 6.From the above mentioned results, several recommendations could be suggested in order to compensate for losses of unconfined compressive strenght and densit v due to delayed compaction. They are a) to use coarse-grained granite soil rather than fined-grained one, b) to add about 3% excess compaction moisture content, c) to increase compactive effort to a certain degree, and d) to use secondary additives like line gypsum-plaster, flyash, and sugar in proper quantity depending on the soil types.

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EPD time delay in etching of stack down WSix gate in DPS+ poly chamber

  • Ko, Yong Deuk;Chun, Hui-Gon
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2002년도 추계학술대회 발표 논문집
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    • pp.130-136
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    • 2002
  • Device makers want to make higher density chips as devices shrink, especially WSix poly stack down is one of the key issues. However, EPD (End Point Detection) time delay was happened in DPS+ poly chamber which is a barrier to achieve device shrink because EPD time delay killed test pattern and next generation device. To investigate the EPD time delay, a test was done with patterned wafers. This experimental was carried out combined with OES(Optical Emission Spectroscopy) and SEM (Scanning Electron Microscopy). OES was used to find corrected wavelength in WSix stack down gate etching. SEM was used to confirm WSix gate profile and gate oxide damage. Through the experiment, a new wavelength (252nm) line of plasma is selected for DPS+ chamber to call correct EPD in WSix stack down gate etching for current device and next generation device.

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Time-Delay Estimation in the Multi-Path Channel based on Maximum Likelihood Criterion

  • Xie, Shengdong;Hu, Aiqun;Huang, Yi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제6권4호
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    • pp.1063-1075
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    • 2012
  • To locate an object accurately in the wireless sensor networks, the distance measure based on time-delay plays an important role. In this paper, we propose a maximum likelihood (ML) time-delay estimation algorithm in multi-path wireless propagation channel. We get the joint probability density function after sampling the frequency domain response of the multi-path channel, which could be obtained by the vector network analyzer. Based on the ML criterion, the time-delay values of different paths are estimated. Considering the ML function is non-linear with respect to the multi-path time-delays, we first obtain the coarse values of different paths using the subspace fitting algorithm, then take them as an initial point, and finally get the ML time-delay estimation values with the pattern searching optimization method. The simulation results show that although the ML estimation variance could not reach the Cramer-Rao lower bounds (CRLB), its performance is superior to that of subspace fitting algorithm, and could be seen as a fine algorithm.

병합트랜지스터를 이용한 고속, 고집적 ISL의 설계 (Design of a high speed and high intergrated ISL(Intergrated Schottky Logic) using a merged transistor)

  • 장창덕;이용재
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 1999년도 춘계종합학술대회
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    • pp.415-419
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    • 1999
  • Many bipolar logic circuit of conventional occurred problem of speed delay according to deep saturation state of vertical NPN Transistor. In order to remove minority carries of the base region at changing signal in conventional bipolar logic circuit, we made transistor which is composed of NPN transistor shortened buried layer under the Base region, PNP transistor which is merged in base, epi layer and substrate. Also the Ring-Oscillator for measuring transmission time-delay per gate was designed as well. The structure of Gate consists of the vertical NPN Transistor, substrate and Merged PNP Transistor. In the result, we fount that tarriers which are coming into intrinsic Base from Emitter and the portion of edge are relatively a lot, so those make Base currents a lot and Gain is low with a few of collector currents because of cutting the buried layer of collector of conventional junction area. Merged PNP Transistor's currents are low because Base width is wide and the difference of Emitter's density and Base's density is small. we get amplitude of logic voltage of 200mv, the minimum of transmission delay-time of 211nS, and the minimum of transmission delay-time per gate of 7.26nS in AC characteristic output of Ring-Oscillator connected Gate.

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Adaptive Wireless Network Coding for Infrastructure Wireless Mesh Networks

  • Carrillo, Ernesto;Ramos, Victor
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제13권7호
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    • pp.3470-3493
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    • 2019
  • IEEE 802.11s-based infrastructure Wireless Mesh Networks (iWMNs) are envisaged as a promising solution to provide ubiquitous wireless Internet access. The limited network capacity is a problem mainly caused by the medium contention between mesh users and the mesh access points (MAPs), which gets worst when the mesh clients employ the Transmission Control Protocol (TCP). To mitigate this problem, we use wireless network coding (WNC) in the MAPs. The aim of this proposal is to take advantage of the network topology around the MAPs, to alleviate the contention and maximize the use of the network capacity. We evaluate WNC when is used in MAPs. We model the formation of coding opportunities and, using computer simulations, we evaluate the formation of such coding opportunities. The results show that as the users density grows, the coding opportunities increase up to 70%; however, at the same time, the coding delay increments significantly. In order to reduce such delay, we propose to adaptively adjust the time that a packet can wait to catch a coding opportunity in an MAP. We assess the performance of moving-average estimation methods to forecast this adaptive sojourn time. We show that using moving-average estimation methods can significantly decrease the coding delay since they consider the traffic density conditions.

극단적인 네트워크 환경을 위한 효율적인 라우팅 알고리즘 (An Efficient Routing Algorithm for extreme networking environments)

  • 왕종수;서두옥
    • 디지털산업정보학회논문지
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    • 제8권1호
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    • pp.47-53
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    • 2012
  • Sensor networks and car networks that have different structure from that of conventional TCP/IP network require extreme network environment due to frequent change of connectivity. Because such extreme network environment has characteristics like unreliable link connectivity, long delay time, asymmetrical data transfer rate, and high error rate, etc., it is difficult to perform normally with the conventional TCP/P-based routing. DTNs (delay and disruption tolerant network) was designed to support data transfer in extreme network environment with long delay time and no guarantee for continuous connectivity between terminals. This study suggests an algorithm that limits the maximum number of copying transferred message to L by improving the spray and wait routing protocol, which is one of the conventional DTNs routing protocols, and using the azimuth and density data of the mobile nods. The suggested algorithm was examined by using ONE, a DTNs simulator. As a result, it could reduce the delay time and overhead of unnecessary packets compared to the conventional spray and wait routing protocol.