• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.2
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• pp.69-75
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• 1999

The characteristics of $H_2$ gas detection have been investigated using the Pt-MIS capacitor composed of the LPCVD nitride on the oxide. The flat band voltage shift is measured as 0.1 V in 1,000 ppm $H_2$ gas ambient and to be independent of Pt catalyst thickness. It is found that the flatband voltage shift is proportional to the hydrogen concentrations. The response and recovery time of Pt-MIS capacitor are 5 mins and 25 mins respectively. The samples of 30nm thick Pt revealed much higher sensitivity than that of 150nm samples. The samples of 150nm Pt showed that the flatband voltage shift of the device is due to the formation of the dipole layer of the adsorbed hydrogen atoms at the Pt-insulator interface.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1265-1267
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• 1993

The switching and the retention characteristics with the injection conditions(pulse height and pulse width) were investigated in the nonvolatile MNOS memories with thin oxide layer of $23{\AA}$ thick. The shift of flatband voltage was measured using the fast ramp C-V method and experimental results were analized using the previously developed models. It was shown that the experimental results were described quit well by the trap-assisted and modified Fowler-Nordheim tunneling models for the voltage pulse of $15V{\sim}19V,\;24V{\sim}25V$, respectively. However, the direct tunneling model was agreement with experimental values in all range of pulse height. As increasing the initial shift of the flatband voltage, the decay rate was increased. But for the same initial shift of the flatband voltage, the decay rate was smaller for low and long pulse than for high and short one.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.218-218
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• 2010

유기물과 무기물이 결합한 유기물/무기물 나노복합체는 차세대 전자 소자 제작에 있어 저전력 및 높은 생산성으로 인해 유용한 소재로 각광받고 있다. 유기물/무기물 나노복합체에 사용되는 물질 중에서 코어-쉘 구조의 나노 입자를 사용한 나노복합체는 나노 입자의 쉘에 의한 메모리 특성의 변화로 인해 차세대 메모리 소자에 응용하려는 연구가 활발히 진행되고 있다. 그러나 코어-쉘 나노 입자가 분산되어 삽입된 고분자 박막 구조를 사용한 비휘발성 메모리의 쉘에 의한 메모리 특성 변화에 대한 연구는 비교적 미미하다. 본 연구에서는 CdTe-CdSe 나노 입자가 Poly(9-vinylcarbazol) (PVK) 박막에 분산된 구조를 기억층으로 사용하는 비휘발성 메모리 소자의 제작과 CdSe 쉘 층에 의한 메모리 특성의 변화에 대한 관찰을 수행하였다. 코어-쉘 나노입자에서 쉘의 역할을 알기 위하여 CdTe-CdSe 나노 입자와 CdTe 나노 입자를 각각 PVK에 톨루엔을 사용하여 녹여 나노 입자가 분산된 용액들을 제작하였다. 두 용액을 p-Si 기판 위에 스핀 코팅으로 도포한 후에 열을 가해 나노복합체를 형성하고 Al을 게이트 전극으로 증착한다. 제작된 두 가지 Al/CdTe-CdSe나노 입자＋PVK/p-Si 소자와 Al/CdTe나노 입자＋PVK/p-Si 소자는 정전용량-전압 (C-V) 측정 결과 히스테리시스 특성이 관찰되었다. CdTe-CdSe 나노 입자를 포함한 소자의 C-V 곡선의 flatband voltage shift는 0.5 V이고, CdTe 나노입자를 포함한 소자의 C-V 곡선의 flatband voltage shift는 1.1 V이다. CdTe-CdSe 나노 입자가 포함된 소자와 CdTe 나노 입자가 포함된 소자의 flatband voltage shift의 차이가 나타나는 원인에 대하여 에너지 밴드 대역도를 사용하여 설명하였다. 본 연구결과는 코어-쉘 나노 입자를 사용하는 비휘발성 메모리 소자에서 쉘에 의한 메모리 특성 변화에 대한 정보를 제공할 것이다.

• Korean Journal of Materials Research
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• v.1 no.3
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• pp.125-131
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• 1991

Boron penetration phenomenon of $p^{+}$ silicon gate with as-deposited amorphous or polycrystalline Si upon high temperature annealing was investigated using high frequency C-V (Capacitance-Volt-age) analysis, CCST(Constant Current Stress Test), TEM(Transmission Electron Microscopy) and SIMS(Secondary Ion Mass Spectroscopy), C-V analysis showed that an as-deposited amorphous Si gate resulted in smaller positive shifts in flatband voltage compared wish a polycrystalline Si gate, thus giving 60-80 percent higher charge-to-breakdown of gate oxides. The reduced boron penetration of amorphous Si gate may be attributed to the fewer grain boundaries available for boron diffusion into the gate oxide and the shallower projected range of $BF_2$ implantation. The relation between electron trapping rate and flatband voltage shift was also discussed.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.829-831
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• 1992

Ultrathin metal-oxide-semiconductor(MOS) gate dielectrics have been fabricated by conventional thermal oxidation in $N_2O$ ambient. Compared to oxides grown in $O_2$, $N_2O$ oxides exhibit significantly low flatband voltage and small shift in flatband voltage. $N_2O$ oxidation induces a slight decrease in mobile ionic charge density($N_m$), fixed charge density($N_f$) and surface state charge density($N_{ss}$). This study establishes that $N_2O$ oxides may have a great impact on future MOS ULSI technology in which ultrathin gate dielectrics are required.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.10
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• pp.465-472
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• 1986

The present study was carried out to investigate the mechanism which control the voltage instability and the breakdown of CVD Al2O3 on Si substrates. Our sample were metal-Al2O3-Oi Capacitors with both Al and Au field plates. Electron injection and trapping, with resultant positive flatband voltage shift, occur at fields as low as 1-2[MV/cm.] We developed an approximate method for computing the location of the centroid of the trapped electrons. Our results indicate that the electrons are trapped near the injecting interface, at least for fields less than about 5[MV/cm ] Because of continued charging, a true steady state is probably never reached, and the only unique I-V curve is the one obtained initially, when the traps are empty. We measured this I-V curve for both polarities of applied voltage, using a fresh sample for each point. The observed current densities are much larger than those obtained in thermally grawn SiO2.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.5
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• pp.473-478
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• 2016

In this paper, the MIS(: Metal-Insulator-Semiconductor) Capacitor with the nitrided-oxide by RTP are fabricated to investigate the carrier trap parameters due to avalanche electron injection. Two times turn-around phenomenon of the flatband voltage shift generated by the avalanche injection are observed. This shows that electron trapping occurs in the oxide film at the first stage. As the electron injection increases, the first turn-around occures due to a positive charge in the oxide layer. After further injection, the curves turns around once again by electron captured. Based on the experimental results, the carrier trapping model for system having multi-traps is proposed and is fitting with experimental data in order to determine trap parameter of nitrided-oxide.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.46-49
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• 1994

In this paper we investigate the characteristics of switching and memory traps in sealed MONOS nonvolatile memory devices with different nitride thicknesses. We have demonttrated flatband voltage shift of 1V with 5V programming voltage. By fitting the experimental observations with theoretical calculations, trap density and capture cross section of memory trap at the nitride-blocking oxide interface are estimated to be 1.0${\times}$10$\^$13/ cm$\^$-2/ and 8.0${\times}$10$\^$14/ cm$\^$-2/

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1988.10a
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• pp.95-97
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• 1988

The instability of MOS devices is mainly caused by the oxide charges, and as the need to develop the gate metal grows researches for various new metal gate have been performed, and in these researches, the difference work function existing between the metal and the semiconductor should be considered. Here int his paper, the device is made by the sputtering and the LPCVD method using pure Al, compound metal. poly-si, as a gate metal, the result of the research was shown that the work function difference from using different gate metals effects on the flatband voltage shift. This means we can infer that the threshold voltage adjustment is possible by using different gate metals and this whole mechanism makes the devices behavior more stable.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.144-147
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• 2003

Cu+ ions drift diffusion in formal oxide film and SiOCH film for interlayer dielectric is evaluated. The diffusion is investigated by measuring shift in the flatband voltage of capacitance/voltage measurements on Cu gate capacitors after bias temperature stressing. At a field of 0.2MV/cm and temperature $200^{\circ}C,\;300^{\circ}C,\;400^{\circ}C,\;500^{\circ}C$ for 10min, 30min, 60min. The Cu+ ions drift rate of $SiOCH(k=2.85{\pm}0.03)$ film is considerable lower than termal oxide. As a result of the experiment, SiOCH film is higher than Thermal oxide film for Cu+ drift diffusion resistance. The important conclusion is that SiOCH film will solve a causing reliability problems aganist Cu+ drift diffuion in dielectric materials.