• Title/Summary/Keyword: kink effect

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A Study on the Reduction of Current Kink Effect in NMOSFET SOI Device (NMOSFET SOI 소자의 Current Kink Effect 감소에 관한 연구)

  • Han, Myoung-Seok;Lee, Chung-Keun;Hong, Shin-Nam
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.2
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    • pp.6-12
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    • 1998
  • Thin film SOI(Silicon-on-insulator) device offer unique advantages such as reduction in short channel effects, improvement of subthreshold slope, higher mobility, latch-up free nature, and so on. But these devices exhibit floating-body effet such as current kink which inhibits the proper device operation. In this paper, the SOI NMOSFET with a T-type gate structure is proposed to solve the above problem. To simulate the proposed device with TSUPREM-4, the part of gate oxide was considered to be 30nm thicker than the normal gate oxide. The I-V characteristics were simulated with 2D MEDICI. Since part of gate oxide has different oxide thickness, the gate electric field strength is not same throughout the gate and hence the impact ionization current is reduced. The current kink effect will be reduced as the impact ionization current drop. The reduction of current kink effect for the proposed device structure were shown using MEDICI by the simulation of impact ionization current, I-V characteristics, and hole current distribution.

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The Electrical Properties of Single-silicon TFT Structure with Symmetric Dual-Gate for kink effect suppression

  • Lee, Deok-Jin;Kang, Ey-Goo
    • Journal of the Korea Computer Industry Society
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    • v.6 no.5
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    • pp.783-790
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    • 2005
  • In this paper, we have simulated a Symmetric Dual-gate Single-Si TFT which has three split floating n+ zones. This structure reduces the kink-effect drastically and improves the on-current. Due to the separated floating n+ zones, the transistor channel region is split into four zones with different lengths defined by a floating n+ region, This structure allows an effective reduction of the kink-effect depending on the length of two sub-channels. The on-current of the proposed dual-gate structure is 0.9mA while that of the conventional dual-gate structure is 0.5mA at a 12V drain voltage and a 7V gate voltage. This result shows a 80% enhancement in on-current. Moreover we observed the reduction of electric field in the channel region compared to conventional single-gate TFT and the reduction of the output conductance in the saturation region. In addition, we also confirmed the reduction of hole concentration in the channel region so that the kink-effect reduces effectively.

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Single-silicon TFT Structure for Kink-effect Suppression with Symmetric Dual-gate by Three Split floating N+ Zones (Kink-effect 개선을 위한 세 개의 분리된 N+ 구조를 지닌 대칭형 듀얼 게이트 단결정 TFT 구조에 대한 연구)

  • Lee, Dae-Yeon;Hwang, Sang-Jun;Park, Sang-Won;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.5
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    • pp.423-430
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    • 2005
  • In this paper, we have simulated a Symmetric Dual-gate Single-Si TFT which has three split floating $n^{+}$ zones. This structure reduces the kink-effect drastically and improves the on-current. Due to the separated floating $n^{+}$ zones, the transistor channel region is split into four zones with different lengths defined by a floating $n^{+}$ region. This structure allows an effective reduction of the kink-effect depending on the length of two sub-channels. The on-current of the proposed dual-gate structure is 0.9 mA while that of the conventional dual-gate structure is 0.5 mA at a 12 V drain voltage and a 7 V gate voltage. This results show a $80 {\%}$ enhancement in on-current by adding two floating $n^{+}$ zones. Moreover we observed the reduction of electric field In the channel region compared to conventional single-gate TFT and the reduction of the output conductance in the saturation region. In addition we also confirmed the reduction of hole concentration in the channel region so that the kink-effect reduces effectively.

Electrical Characteristics of Single-silicon TFT Structure with Symmetric Dual-gate for Kink Effect Suppression

  • Kang Ey-Goo;Lee Dae-Yeon;Lee Chang-Hun;Kim Chang-Hun;Sung Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.7 no.2
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    • pp.53-57
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    • 2006
  • In this paper, a Symmetric Dual-gate Single-Si TFT, which includes three split floating n+ zones, is simulated. This structure drastically reduces the kink-effect and improves the on-current. This is due to the separated floating n+ zones, the transistor channel region is split into four zones with different lengths defined by a floating n+ region. This structure allows effective reduction in the kink-effect, depending on thy length of the two sub-channels. The on-current of the proposed dual-gate structure is 0.9 mA, while that of the conventional dual-gate structure is 0.5 mA, at both 12 V drain and 7 V gate voltages. This result shows an 80% enhancement in on-current. In addition, the reduction of electric field in the channel region compared to a conventional single-gate TFT and the reduction of the output conductance in the saturation region, is observed. In addition, the reduction in hole concentration, in the channel region, in order for effectively reducing the kink-effect, is also confirmed.

Compression Strength Size Effect on Carbon-PEEK Fiber Composite Failing by Kink Band Propagation

  • Kim, Jang-Ho
    • KCI Concrete Journal
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    • v.12 no.1
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    • pp.57-68
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    • 2000
  • The effect of structure size on the nominal strength of unidirectional fiber-polymer composites, failing by propagation of a kink band with fiber microbuckling, is analyzed experimentally and theoretically. Tests of novel geometrically similar carbon-PEEK specimens, with notches slanted so as to lead to a pure kink band (without shear or splitting cracks), are conducted. The specimens are rectangular strips of widths 15.875, 31.75. and 63.5 mm (0.625, 1.25 and 2.5 in and gage lengths 39.7, 79.375 and 158.75 mm (1.563, 3.125 and 6.25 in.). They reveal the existence of a strong (deterministic. non-statistical) size effect. The doubly logarithmic plot of the nominal strength (load divided by size and thickness) versus the characteristic size agrees with the approximate size effect law proposed for quasibrittle failures in 1983 by Bazant This law represents a gradual transition from a horizontal asymptote, representing the case of no size effect (characteristic of plasticity or strength criteria), to an asymptote of slope -1/2 (characteristic of linear elastic fracture mechanics. LEFM) . The size effect law for notched specimens permits easy identification of the fracture energy of the kink bandand the length of the fracture process zone at the front of the band solely from the measurements of maximum loads. Optimum fits of the test results by the size effect law are obtained, and the size effect law parameters are then used to identify the material fracture characteristics, Particularly the fracture energy and the effective length of the fracture process zone. The results suggest that composite size effect must be considered in strengthening existing concrete structural members such as bridge columns and beams using a composite retrofitting technique.

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A Study on Partially-Depleted SOI MOSFET with Multi-gate (다중 게이트을 이용한 부분 공핍형 SOI MOSFET 특성에 관한 연구)

  • Shin, K.S.;Park, Y.K.;Lee, S.J.;Kim, C.J.
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1286-1288
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    • 1997
  • In this study, partially-depleted SOI MOSFET with multi-gate was fabricated on p-type SIMOX(Seperation by Implanted Oxygen). As increase the number of its gate, increase the breakdown voltage. But kink effect was not affected by the number of its gate. However, it is known that the asymmetric gate structure reduce kink effect. So if asymmetric multi-gate applied to partially-depleted SOI MOSFET, it is expected that the breakdown voltage of SOI MOSET with asymmetric multi-gate is higher than that of SOI MOSFET with single gate and that kink effect is reduced by SOI MOSFET with asymmetric multi-gate.

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Simulation on Electrical Properties of SiGe PD-SOI MOSFET for Improved Minority Carrier Conduction (소수운반자 전도 SiGe PD-SOI MOSFET의 전기적 특성에 대한 전산 모사)

  • Yang, Hyun-Deok;Choi, Sang-Sik;Han, Tae-Hyun;Cho, Deok-Ho;Kim, Jae-Yeon;Shim, Kyu-Hwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.21-22
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    • 2005
  • Partially-depleted Silicon on insulator metal-oxide-semiconductor field- effect transistors (PD-SOI MOSFETs) with Silicon-germanium (SiGe) layer is investigated. This structure uses SiGe layer to reduce the kink effect in the floating body region near the bottom channel/buried oxide interface. Among many design parameters influencing the performance of the device, Ge composition is presented most predominant effects, simulation results show that kink effect is reduced with increase the Ge composition. Because the bandgap of SiGe layer is reduced at higher Ge composition, the hole current between body and SiGe layer is enhanced.

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Analysis of the Electirical Characteristics on n-channel LDD structured poly-Si TFT's (LDD 구조를 가지는 n-채널 다결정 실리콘 박막 트랜지스터의 전기적 특성 분석)

  • 김동진;강창수
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.37 no.2
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    • pp.12-16
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    • 2000
  • The electrical characteristics of n-channel LDD structured poly-Si TFT's have been systematically investigated. It have been found that the LDD regions act as the effect of series resistance and reducing the electric field. Kink effect is disappeared and off current is greatly reduced, while on current is slightly reduced. On/off current ratio graph shows that LDD device's switching characteristic is better than that of conventional device. As a result of study, it is concluded that the effect of electric field's reduction is more dominant than that of series resistance.

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GOLDD 구조를 갖는 LTPS TFT 소자의 전기적 특성 비교분석

  • Kim, Min-Gyu;Jo, Jae-Hyeon;Lee, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.40-40
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    • 2009
  • The electrical characteristic of the conventional self-aligned polycrystalline silicon (poly-Si) TFTs are known to present several undesired effects such as large leakage current, kink effect and hot-carrier effects. In this paper, LTPS TFTs with different GOLDD length were fabricated and investigated the effect of the GOLDD. GOLDD length of 1, 1.5 and $2{\mu}m$ were used, while the thickness of the gate dielectrics($SiN_x/SiO_2$) was fixed at 65nm(40nm/25nm). The electrical characteristics show that the kink effect is reduced at the LTPS TFTs, and degradation from the hot-carrier effect was also decreased by increasing GOLDD length.

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A Novel Body-tied Silicon-On-Insulator(SOI) n-channel Metal-Oxide-Semiconductor Field-Effect Transistor with Grounded Body Electrode

  • Kang, Won-Gu;Lyu, Jong-Son;Yoo, Hyung-Joun
    • ETRI Journal
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    • v.17 no.4
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    • pp.1-12
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    • 1996
  • A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current ($I_{DS}-V_{DS}$) curves, substrate resistance effect on the $I_{DS}-V_{DS}$ curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.

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