• Title/Summary/Keyword: phase offset

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Joint Phase and Frequency Offset Estimator for Short Burst MPSK Transmission with Preamble

  • Kim Seung-Geun;Lim Young-Kon
    • The Journal of the Acoustical Society of Korea
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    • v.24 no.4E
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    • pp.152-157
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    • 2005
  • In this paper, a new data-aided joint phase and frequency estimator, which has very low computational complexity, is proposed and its variances of phase and frequency estimates are derived. To estimate the phase and frequency offset, first of all, the overall observation interval is divided into same length sub-intervals, and then phase estimates are independently computed based on symbols of the each sub-intervals. To be continue the sequence of computed phase estimates, proper integer multiples of $2{\pi}$ are added to (or subtracted from) the computed phase estimates, which is called linearized phase estimate. The phase offset of the proposed joint estimator is estimated by averaging the linearized phase estimates and the frequency offset by averaging the differences between consecutive linearized phase estimates. The variance of the proposed phase offset estimate is same to MCRB of phase if there is no frequency offset, but it is smaller than MCRB of phase if there is frequency offset. However, the variance of the proposed frequency offset estimate is bigger by at least 0.5 dB than MCRB of frequency with the same observation interval.

Phase Offset Enumeration Method with Error Detection and Its Application to Synchronization of PN Sequences

  • Song Young-Joan
    • Journal of electromagnetic engineering and science
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    • v.5 no.1
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    • pp.26-30
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    • 2005
  • It is important to know phase offsets of PN(Pseudo Noise) sequences in spread spectrum communications since the acquisition is equivalent to making a phase offset between a receiving PN sequence and a PN sequence of local PN generator be identical. In this paper, a phase offset enumeration method for PN sequences with error detection, and its application to the synchronization are proposed. The phase offset enumeration for an n-tuple PN sequence and its error detection are performed when one period of the sequence is received. Once the phase offset of the receiving sequence is calculated, we can easily accomplish the synchronization by initializing shift registers of a local PN generator according to the phase offset value. The mean acquisition time performance of the proposed scheme was derived analytically. Since this synchronization scheme can be realized by using simple circuit and acquires very rapid acquisition in high SNR but shows performance degradation in low SNR, it can be especially useful in indoor and office environments.

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

  • Huang, Xiaojiang;Dong, Lei;Xiao, Furong;Liao, Xiaozhong
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.310-318
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    • 2016
  • This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.

A Novel Frequency Offset Estimation Algorithm for Chirp Spread Spectrum Based on Matched Filter (정합필터 기반의 Chirp Spread Sprectrum을 위한 새로운 주파수 오프셋 추정 알고리즘)

  • Kim, Yeong-Sam;Chong, Jong-Wha
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.10
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    • pp.1-7
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    • 2010
  • A new frequency offset estimation algorithm for chirp spread spectrum based on matched filter is proposed. Generally, the differential phase between successive symbols is used for the conventional frequency offset estimation algorithm. However, if the conventional frequency offset estimation algorithm is used for CSS, phase ambiguity arises because of long symbol duration and guard time. The phase ambiguity causes performance degradation of matched filter since the received signal is corrupted by the integer frequency offset. In this paper, we propose a new frequency offset estimation algorithm which separates integer and fractional frequency offset estimation for removing the phase ambiguity. The proposed algorithm estimates the integer frequency offset by using differential phase between matched filtering results of sub-chirps and successive symbols. Then, the fractional frequency offset is estimated by using the differential phase between successive symbols Simulation results show that the proposed algorithm well removes the phase ambiguity, and have almost same estimation performance compared with conventional one when there is not the phase ambiguity.

Blind symbol timing offset estimation for offset-QPSK modulated signals

  • Kumar, Sushant;Majhi, Sudhan
    • ETRI Journal
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    • v.42 no.3
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    • pp.324-332
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    • 2020
  • In this paper, a blind symbol timing offset (STO) estimation method is proposed for offset quadrature phase-shift keying (OQPSK) modulated signals, which also works for other linearly modulated signals (LMS) such as binary-PSK, QPSK, 𝜋/4-QPSK, and minimum-shift keying. There are various methods available for blind STO estimation of LMS; however, none work in the case of OQPSK modulated signals. The popular cyclic correlation method fails to estimate STO for OQPSK signals, as the offset present between the in-phase (I) and quadrature (Q) components causes the cyclic peak to disappear at the symbol rate frequency. In the proposed method, a set of close and approximate offsets is used to compensate the offset between the I and Q components of the received OQPSK signal. The STO in the time domain is represented as a phase in the cyclic frequency domain. The STO is therefore calculated by obtaining the phase of the cyclic peak at the symbol rate frequency. The method is validated through extensive theoretical study, simulation, and testbed implementation. The proposed estimation method exhibits robust performance in the presence of unknown carrier phase offset and frequency offset.

Phase Offset Correction using Early-Late Phase Compensation in Direct Conversion Receiver (직접 변환 수신기에서 Early-Late 위상 보상기를 사용한 위상 오차 보정)

  • Kim Young-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.638-646
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    • 2005
  • In recent wireless communications, direct conversion transceiver or If sampling SDR-based receivers have being designed as an alternative to conventional transceiver topologies. In direct conversion receiver a.chitectu.e, the 1.equency/phase offset between the RF input signal and the local oscillator signal is a major impairment factor even though the conventional AFC/APC compensates the service deterioration due to the offset. To rover the limited tracking range of the conventional method and effectively aid compensation scheme in terms of I/Q channel imbalances, the frequency/phase offset compensation in RF-front end signal stage is proposed in this paper. In RF-front end, the varying phase offset besides the fixed large frequency/phase offset are corrected by using early-late phase compensator. A more simple frequency and phase tacking function in digital signal processing stage of direct conversion receiver is effectively available by an ingenious frequency/phase offset tracking method in RF front-end stage.

Improved DC Offset Error Compensation Algorithm in Phase Locked Loop System

  • Park, Chang-Seok;Jung, Tae-Uk
    • Journal of Electrical Engineering and Technology
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    • v.11 no.6
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    • pp.1707-1713
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    • 2016
  • This paper proposes a dc error compensation algorithm using dq-synchronous coordinate transform digital phase-locked-loop in single-phase grid-connected converters. The dc errors are caused by analog to digital conversion and grid voltage during measurement. If the dc offset error is included in the phase-locked-loop system, it can cause distortion in the grid angle estimation with phase-locked-loop. Accordingly, recent study has dealt with the integral technique using the synchronous reference frame phase-locked-loop method. However, dynamic response is slow because it requires to monitor one period of grid voltage. In this paper, the dc offset error compensation algorithm of the improved response characteristic is proposed by using the synchronous reference frame phase-locked-loop. The simulation and the experimental results are presented to demonstrate the effectiveness of the proposed dc offset error compensation algorithm.

A Study on Frequency Offset Compensation using 2-Phase Characteristic of Beacon Signal modulated by Satellite (위성 변조 비콘 신호의 2위상 특성을 이용한 주파수 오프셋 보상방법에 대한 연구)

  • Choi, Chul-Hee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.1
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    • pp.97-103
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    • 2018
  • In satellite communication, modulated beacon signal is spreaded by gold sequence and the modulated beacon is transmitted via linear phase modulation. Due to the difference in characteristics of the satellite and the receiver on the ground, frequency offset (FO) occurs. An existing modulated beacon receiver is a method of synchronizing the frequency of a modulated beacon signal using FFT(Fast Fourier Transform), which not only increases the delay and complexity in terms of system implementation but also has a separate circuit for compensating the phase difference due to FO and phase offset from FFT points. In order to overcome this problem, this paper proposes and analyzes a scheme for compensating and demodulating the coarse FO and phase offset at one time using the 2-phase shaped characteristics of the modulated beacon signal. Also, through the simulation, the modulation index suitable for the proposed method is analyzed and the appropriate cumulative number is also analyzed.

Design and Fabrication of a Offset-PLL with DAC (DAC를 이용한 Offset-PLL 설계 및 제작)

  • Lim, Ju-Hyun;Song, Sung-Chan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.2
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    • pp.258-264
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    • 2011
  • In this paper, we designed a frequency synthesizer with a low phase noise and fast lock time and excellent spurious characteristics using the offset-PLL(Phase Locked Loop) that is used in GSM(Global System for Mobile communications). The proposed frequency synthesizer has low phase noise using three times down conversion and third offset frequency of this synthesizer is created by DDS(Direct Digital Synthesizer) to have high frequency resolution. Also, this synthesizer has fast switching speed using DAC(Digital to Analog Converter). but phase noise degraded due to DAC. we improved performance using the DAC noise filter.

A Study on Current Ripple Reduction Due to Offset Error in SRF-PLL for Single-phase Grid-connected Inverters (단상 계통연계형 인버터의 SRF-PLL 옵셋 오차로 인한 전류 맥동 저감에 관한 연구)

  • Hwang, Seon-Hwan;Hwang, Young-Gi;Kwon, Soon-Kurl
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.28 no.11
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    • pp.68-76
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    • 2014
  • This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.