• Korean Journal of Materials Research
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• v.5 no.2
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• pp.203-207
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• 1995

Polysilicon this film transistors (poly-Si TFTs) with different channel dimensions were fabricated on low-temperature crystalized amorphous silicon films and on as-deposited polysilicon films. The electrical characteristics of these TFTs were characterized and compared. The performance of the TFTs fabricated on the solid-phase crystalized amophous silicon films ws showon to be superior to that of the TFTs fabricated on the as-deposited polysilicon films. It was found that the performance of poly-Si TFTs depends strongly on the material characteristics of the polysilicon films used as the active layers, but only weakly on the channel dimensions.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.907-910
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• 2008

The effect of channel length reduction on the electrical characteristics of self-aligned polysilicon TFTs has been investigated by combining experimental characteristics and 2-D numerical simulations. The role of drain induced barrier lowering and floating body effects has been carefully analized using numerical simulations.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.513-518
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• 2006

An investigation of the transport properties of polysilicon TFTs, using sequential laterally solidified, SLS, material, is presented. This material has a location controlled distribution of grain boundaries, GBs, which makes it particularly useful for the analysis of their influence on the performance of polysilicon TFTs, and to address the issue of the role of spatially localised trapping states. The experimental results were analyzed by using numerical simulations, and the effective medium approximation was compared with a discrete grain model.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1065-1070
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• 2007

The effects of hot carriers and self-heating on the electrical stability of p-channel TFTs have been analysed combining experimental data and numerical simulations. While hot carrier effects were shown not to induce appreciable degradation, self-heating related instability was found to more seriously affect the device characteristics. New models have been developed to explain the reported results.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.261-264
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• 2007

We developed a non self-aligned poly-silicon TFTs fabrication process at two different temperatures on spin-coated polyimide layer above Si-wafer. After TFTs fabrication, the polyimide layer was mechanically released from the Si-wafer and the devices characteristics were compared. In addition self-heating and hot-carrier induced instabilities were analysed.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.5
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• pp.54-59
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• 1995

We have proposed a novel self-aligned offset gated polysilicon TFTs device without an offset mask in order to reduce a leakage current and suppress a kink effect. The photolithographic process steps of the new TFTs device are identical to those of conventional non-offset structure TFTs and an additional mask to fabricate an offset structure is not required in our device due to the self-aligned process. The new device has demonstrated a lower leakage current and a better ON/OFF current ratio compared with the conventional non-offset device. The new TFT device also exhibits a considerable reduction of the kink effect because a very thin film TFT devices may be easily fabricated due to the elimination of contact over-etch problem.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1254-1257
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• 2004

Comparative study on the effects of $H_2$ vs. $O_2$ plasma pretreatment of gate oxide on the degradation phenomenon of p-channel low-temperature polysilicon (LTPS) thin-film transistors (TFTs) were performed. After high drain current stress (HDCS) with $V_{gs}$ = $V_{ds}$, the p-channel TFTs pretreated by $O_2$ plasma showed increased immunity to the degradation of device characteristics such as threshold voltage and maximum field effect mobility because of the higher binding energy of Si-O bond than that of Si-H bond. The investigation of degradation phenomenon of these parameters with the applied power suggests that self-heating can be the major cause of degradation of polysilicon TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.293-293
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• 2005

The differences between floating and grounded body effects in polycrystalline silicon thin-film transistors (polysilicon TFTs) are investigated by making a body contact. The floating body effects such as kink effect, subthreshold slope change, and body current characteristics are explained and modeled by impact ionization, which causes source body turn on, and activates the parasitic bipolar junction transistors (BJTs). These effects become crucial for channel lengths of 4㎛ or shorter. Our data show that making a body contact reduces kink effects significantly and identifies impact ionization mechanism in polysilicon TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.258-261
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• 2009

In this work we present a process to fabricate lowtemperature polysilicon (LTPS) TFTs on polyimide (PI) layers, spin-coated on Si-wafer used as rigid carrier. This process has been then used to fabricate elementary circuits as well as circuits for sensor applications.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.200-200
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• 2003

Polycrystalline Si(polysilicon) TFTs have opened a way for the next generation of display devices, due to their higher mobility of charge carriers relative to a-Si TFTs. The polysilicon W applications extend from the current Liquid Crystal Displays to the next generation Organic Light Emitting Diodes (OLED) displays. In particular, the OLED devices require a stricter control of properties of gate oxide layer, polysilicon layer, and their interface. The polysilicon layer is generally obtained by annealing thin film a-Si layer using techniques such as solid phase crystallization and excimer laser annealing. Typically laser-crystallized Si films have grain sizes of less than 1 micron, and their electrical/dielectric properties are strongly affected by the presence of grain boundaries. Impedance spectroscopy allows the frequency-dependent measurement of impedance and can be applied to inteface-controlled materials, resolving the respective contributions of grain boundaries, interfaces, and/or surface. Impedance spectroscopy was applied to laser-annealed Si thin films, using the electrodes which are designed specially for thin films. In order to understand the effect of grain size on physical properties, the amorphous Si was exposed to different laser energy densities, thereby varying the grain size of the resulting films. The microstructural characterization was carried out to accompany the electrical/dielectric properties obtained using the impedance spectroscopy, The correlation will be made between Si grain size and the corresponding electrical/dielectric properties. The ramifications will be discussed in conjunction with active-matrix thin film transistors for Active Matrix OLED.