• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.27-31
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• 2004

Models and simulations of gate tunneling current for thinoxide MOSFETs and Double-Gate SOIs are discussed. A guideline in design of leaky MOS capacitors is proposed and resonant gate tunneling current in DG SOI simulated based on quantum-mechanicalmodels. Gate tunneling current in fully-depleted, double-gate SOI MOSFETs is characterized based on quantum-mechanical principles. The simulated $I_G-V_G$ of double-gate SOI has negative differential resistance like that of the resonant tunnel diodes.

• Transactions on Electrical and Electronic Materials
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• 제5권5호
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• pp.173-179
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• 2004

The influence of heavily Si impurity doping in the GaN barrier of InGaN/GaN multi-quantum well structures of blue light emitting diodes were investigated by growing samples in metal-organic chemical vapor deposition. The delta-doped sample was compared to the sample with the undoped barrier. The delta-doped sample shows the tunneling behavior and forms the energy level of 0.32 eV for tunneling and the photoemission of the 450-nm band. The photo-luminescence shows the blue-shifted broad band of the radiative transition due to the inclusion of Si delta-doped layer indicating that the delta doping effect acts to form the higher energy level than that of quantum well. The dislocation may provide the carrier tunneling channel and plays as a source of acceptor. During the tunneling of hot carrier, there was no light emission.

• Journal of information and communication convergence engineering
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• 제5권1호
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• pp.45-49
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• 2007

The analytical transport model in subthreshold regime for double gate MOSFET has been presented to analyze the short channel effects such as subthreshold swing, threshold voltage roll-off and drain induced barrier lowering. The present approach includes the quantum tunneling of carriers through the source-drain barrier. Poisson equation is used for modeling thermionic emission current, and Wentzel-Kramers-Brillouin approximations are applied for modeling quantum tunneling current. This model has been used to investigate the subthreshold operations of double gate MOSFET having the gate length of the nanometer range with ultra thin gate oxide and channel thickness under sub-20nm. Compared with results of two dimensional numerical simulations, the results in this study show good agreements with those for subthreshold swing and threshold voltage roll-off. Note the short channel effects degrade due to quantum tunneling, especially in the gate length of below 10nm, and DGMOSFETs have to be very strictly designed in the regime of below 10nm gate length since quantum tunneling becomes the main transport mechanism in the subthreshold region.

• 한국진공학회지
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• 제20권1호
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• pp.57-62
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• 2011

열처리 방식을 통하여 형성된 FePt 나노 입자를 사용하는 자기 양자점 소자를 제작하고, 전기적 및 자기적 특성을 연구하였다. FePt 자기 양자점 터널링 소자는 p 형 Si 기판 상부에 약 20 nm의 $SiO_2$ 터널 절연막을 형성하고 FePt 박막을 3 nm 두께로 증착한 후에 열처리 방식을 이용하여 8~15 nm 크기의 양자점을 갖는 구조이다. 터널링 소자의 전류-전압 특성을 자기장과 온도 변화에 따라 관찰하였고 특히, 저온에서 비선형적인 전류-전압 곡선을 확인하였으며 이러한 단전자 수송현상을 전자의 hopping 모델과 양자점의 터널링 현상을 이용하여 설명하였다. FePt 양자점 터널링 소자는 20 K에서 터널링 현상을 보였으며, 양단에 가해준 전압과 관계없이 외부 자기장이 증가할수록 음의 자기저항이 커지는 현상을 관찰하였고, 9,000 G에서 약 26.2 %의 자기저항 비를 확인하였다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2017년도 추계학술대회
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• pp.241-242
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• 2017

Part of the channel in L-shaped tunnel field-effect transistor (LTFET) is very thin and suffers from quantum confinement effect. Role of quantum confinement effect on band-to-band-tunneling (BTBT) of LTFET was investigated using numerical simulation and band diagram analysis. It was found that quantum confinement effect significantly affects the BTBT mechanism of LTFET devices.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2001년도 춘계학술대회논문집D
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• pp.354-359
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• 2001

As the temperature of liquid under negative pressure approaches the absolute zero, the nucleation process due to thermal fluctuations hardly occurs. Instead of this mechanism, quantum fluctuations may lead the formation of nucleus for new phase in metastable state. In this study, the thermal as well as quantum nucleation bubble in liquid helium under negative pressure was investigated theoretically. The energy barrier against nucleation was estimated by molecular interaction due to the Londom dispersion force. It is shown that the phase transition from liquid to vapor in is possible due to the quantum tunneling below 0.2 K for Helium-4 and 0.1 K for Helium-3, at negative pressures close to the ideal tensile strength at which every liquid molecules become bubbles simultaneously.

• 전자공학회논문지D
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• 제34D권4호
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• pp.27-32
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• 1997

In resonant tunneling diodes with the quantum well structure showing the negative differential resistance (NDR), it is essential to increase both the peak-to-valley current ratio (PVCR) and the peak current desnity ( $J_{p}$) for the accurate digital switching operation and the high output of the device. In this work, a resonant interband tunneling diode (RITD) with single quantum well structure, which is composed of I $n_{0.47}$As/I $n_{0.52}$A $l_{0.48}$As heterojunction on the InP substrate, is fabricated ot improve PVCR and JP, and then the dependence of I-V charcteristics on the width of the quantum well was investigated.d.ted.d.

• EDISON SW 활용 경진대회 논문집
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• 제4회(2015년)
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• pp.357-364
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• 2015

In this work, we investigate the quantum effects exhibited from ultra-thin GAA(gate-all-around) Nanowire FETs for Sub 14nm Technology. We face designing challenges particularly short channel effects (SCE). However traditional MOSFET SCE models become invalid due to unexpected quantum effects. In this paper, we investigated various performance factors of the GAA Nanowire FET structure, which is promising future device. We observe a variety of quantum effects that are not seen when large scale. Such are source drain tunneling due to short channel lengths, drastic threshold voltage increase caused by quantum confinement for small channel area, leakage current through thin gate oxide by tunneling, induced source barrier lowering by fringing field from drain enhanced by high k dielectric, and lastly the I-V characteristic dependence on channel materials and transport orientations owing to quantum confinement and valley splitting. Understanding these quantum phenomena will guide to reducing SCEs for future sub 14nm devices.

• 한국정보통신학회논문지
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• 제7권4호
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• pp.719-724
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• 2003

본 논문은 halo doping profile을 갖는 나노구조 LDD MOSFET의 문턱전압에 대하여 연구하였다. 소자의 크기는 일반화된 스켈링 이론을 사용하여 100nm 에서 40m까지 스켈링하였다. Van Dort Quantum Correction Model(QM) 모델을 정전계 스켈링 이론과 정전압 스켈링 이론에 적용하여 문턱전압을 조사하였으며, gate oxide 두께의 변화 따른 direct tunneling current를 조사하였다. 결과적으로 게이트 길이가 감소됨에 따라 문턱전압이 정전계 스켈링에서는 감소하고 정전압 스켈링에서는 증가함을 알았고 direct tunneling current는 gate oxide 두께가 감소함에 따라 증가됨을 알았다. 또한 채널 길이의 감소에 따른 MOSFET의 문턱전압에 대한 roll-off특성을 최소화하기 위하여 일반화된 스켈링에서 $\alpha$값은 거의 1 이여야 함을 알았다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2002년도 추계종합학술대회
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• pp.494-497
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• 2002

본 논문에서는 halo doping profile을 갖는 나노구조 LDD MOSFET의 문턱전압에 대한 시뮬레이션 결과를 나타내었다. 소자 크기는 generalized scaling을 사용하여 100nm에서 40nm까지 스케일링하였다. Van Dort Quantum Correction Model(QM)을 사용하여 정전계 스케일링과 정전압 스케일링에 대한 문턱 전압과 각각의 게이트 oxide 두께에 대한 direct tunneling 전류를 조사하였다. 게이트 길이가 감소할 때 정전계 스케일링에서는 문턱전압이 감소하고, 정전압 스케일링에서는 문턱전압이 증가하는 것을 알 수 있었고, 게이트 oxide두께가 감소할 때 direct tunneling 전류는 증가함을 알 수 있었다. 감소하는 채널 길이를 갖는 MOSFET 문턱전압에 대한 roll-off 특성을 최소화하기 위해 generalized scaling에서 $\alpha$값은 1에 가깝게 되는 것을 볼 수 있었다.