• Title/Summary/Keyword: scheduling

Search Result 4,864, Processing Time 0.038 seconds

Low-Cost AES Implementation for Wireless Embedded Systems (무선 내장형 시스템을 위한 제비용 AES의 구현)

  • LEE Dong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.41 no.12
    • /
    • pp.67-74
    • /
    • 2004
  • AES is frequently used as a symmetric cryptography algorithm for the Internet. Wireless embedded systems increasingly use more conventional wired network protocols. Hence, it is important to have low-cost implementations of AES for thor The basic architecture of AES unrolls oかy one full cipher round which uses 20 S-boxes together with the key scheduler and the algorithm repeatedly executes it. To reduce the implementation cost further, the folded architecture which uses only eight S-box units was studied in the recent years. In this paper, we will study a low-cost AES implementation for wireless communication technology based on the folded architecture. We first improve the folded architecture to avoid the sixteen bytes of additional state memory. Then, we implemented a single byte architecture where only one S-box unit is used for data encryption and key scheduling. It takes 352 clocks to finish a complete encryption. We found that the maximum clock frequency of its FPGA implementation reaches about 40 MHz. It can achieve about 13 Mbps which is enough for 3G wireless communication technology.

The Customer Premise Platform for Processing Multimedia Data on the ATM network (ATM망의 멀티미디어 데이터 처리를 위한 가입자단 플랫폼)

  • Kim Yunhong;Son Yoonsik
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.42 no.2 s.332
    • /
    • pp.89-96
    • /
    • 2005
  • In this paper, we propose a customer premise platform for processing multimedia data service on the ATM network. The proposed platform has a specific AAL2 processor that includes AAL2 protocol and scheduler algorithm so as to off-load large potion of burden from host processor and make it easy to process multimedia data from the ATM network in real time compared with conventional platform in which AAL/ATM tasks are processed by software. The ATS scheduler that is implemented based on 2-level time slot ring provides a simple and efficient method for scheduling data of VBR-rt, UBR and CBR traffics. TMS320C5402 DSP is used to process voice-related tasks such as voice compression and voice packet manupulation and AAL2 processor is implemented on $0.35\;{\mu}m$ process line. We implemented the customer premise equipment for VoDSL service and tested the proposed platform on a test bed network. The experimental results show that the proposed equipment has the call success rate of $97\%$ at least and provides voice service of toll-qualify.

A Low Power Algorithm using State Transition Ready Method (상태 전환 준비 방법을 이용한 저전력 알고리즘)

  • Youn, Choong-Mo
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.9 no.9
    • /
    • pp.971-976
    • /
    • 2014
  • In this paper, we proposed a low power algorithm using state transition ready method. The proposed algorithm defined a sleep state, a idle state and a run state for the task. A state transition occurring at the time due to the delay time created in order to reduce the power consumption state in the middle of each inserted into the ready state. The ready state considering a power consumption and a delay time in state transition. A scheduling step of performing the steps in excess of the increasing problems have the delay time is long. The power consumption increased for the operation step increase. A state transition from a sleep state with the longest delay time in operating state occurs when the state is switched by the time delay caused by the increase in operating time reduces the overall power consumption reduced. Experiments [6] were compared with the results of the power consumption. The experimental results [6] is reduced power consumption than the efficiency of the algorithm has been demonstrated.

Pedestrian Counting System based on Average Filter Tracking for Measuring Advertisement Effectiveness of Digital Signage (디지털 사이니지의 광고효과 측정을 위한 평균 필터 추적 기반 유동인구 수 측정 시스템)

  • Kim, Kiyong;Yoon, Kyoungro
    • Journal of Broadcast Engineering
    • /
    • v.21 no.4
    • /
    • pp.493-505
    • /
    • 2016
  • Among modern computer vision and video surveillance systems, the pedestrian counting system is a one of important systems in terms of security, scheduling and advertising. In the field of, pedestrian counting remains a variety of challenges such as changes in illumination, partial occlusion, overlap and people detection. During pedestrian counting process, the biggest problem is occlusion effect in crowded environment. Occlusion and overlap must be resolved for accurate people counting. In this paper, we propose a novel pedestrian counting system which improves existing pedestrian tracking method. Unlike existing pedestrian tracking method, proposed method shows that average filter tracking method can improve tracking performance. Also proposed method improves tracking performance through frame compensation and outlier removal. At the same time, we keep various information of tracking objects. The proposed method improves counting accuracy and reduces error rate about S6 dataset and S7 dataset. Also our system provides real time detection at the rate of 80 fps.

Web-based Three-step Project Management Model and Its Software Development

  • Hwang Heung-Suk;Cho Gyu-Sung
    • Proceedings of the Korean Operations and Management Science Society Conference
    • /
    • 2006.05a
    • /
    • pp.373-378
    • /
    • 2006
  • Recently the technical advances and complexities have generated much of the difficulties in managing the project resources, for both scheduling and costing to accomplish the project in the most efficient manner. The project manager is frequently required to render judgments concerning the schedule and resource adjustments. This research develops an analytical model for a schedule-cost and risk analysis based on visual PERT/CPM. We used a three-step approach: 1) in the first step, a deterministic PERT/CPM model for the critical path and estimating the project time schedule and related resource planning and we developed a heuristic model for crash and stretch out analysis based upon a time-cost trade-off associated with the crash and stretch out of the project. 2) In second step, we developed web-based risk evaluation model for project analysis. Major technologies used for this step are AHP (analytic hierarchy process, fuzzy-AHP, multi-attribute analysis, stochastic network simulation, and web based decision support system. Also we have developed computer programs and have shown the results of sample runs for an R&D project risk analysis. 3) We developed an optimization model for project resource allocation. We used AHP weighted values and optimization methods. Computer implementation for this model is provided based on GUI-Type objective-oriented programming for the users and provided displays of all the inputs and outputs in the form of GUI-Type. The results of this research will provide the project managers with efficient management tools.

  • PDF

A Packet Collision Avoidance Technique in IEEE1609.4 Based Time Synchronization Multi-channel Environment (IEEE1609.4 기반 시간 동기 멀티채널 환경에서의 패킷 충돌 회피 기법)

  • Jin, Seong-Keun;Lim, Ki-Taeg;Shin, Dae-Kyo;Yoon, Sang-Hun;Jung, Han-Gyun
    • Journal of IKEEE
    • /
    • v.19 no.3
    • /
    • pp.385-391
    • /
    • 2015
  • In this paper, we analyze the communication performance in a time synchronous multi-channel environment and deal with a packet collision avoidance technique to improve it based on IEEE1609.4 for increasing the efficiency of the control channel IEEE802.11p WAVE communication system. In previous works, they tried to solve this problem by message scheduling method on application layer software or changing the value of the random back-off optionally Contention Window. In this paper, we propose a method for adjusting the Channel Guard Interval for packet collision avoidance. The performance was evaluated by the actual vehicle test. The result was confirmed performance over 90% PDR(Packet Delivery Ratio).

A SPECK Crypto-Core Supporting Eight Block/Key Sizes (8가지 블록/키 크기를 지원하는 SPECK 암호 코어)

  • Yang, Hyeon-Jun;Shin, Kyung-Wook
    • Journal of IKEEE
    • /
    • v.24 no.2
    • /
    • pp.468-474
    • /
    • 2020
  • This paper describes the hardware implementation of SPECK, a lightweight block cipher algorithm developed for the security of applications with limited resources such as IoT and wireless sensor networks. The block cipher SPECK crypto-core supports 8 block/key sizes, and the internal data-path was designed with 16-bit for small gate counts. The final round key to be used for decryption is pre-generated through the key initialization process and stored with the initial key, enabling the encryption/decryption for consecutive blocks. It was also designed to process round operations and key scheduling independently to increase throughput. The hardware operation of the SPECK crypto-core was validated through FPGA verification, and it was implemented with 1,503 slices on the Virtex-5 FPGA device, and the maximum operating frequency was estimated to be 98 MHz. When it was synthesized with a 180 nm process, the maximum operating frequency was estimated to be 163 MHz, and the estimated throughput was in the range of 154 ~ 238 Mbps depending on the block/key sizes.

Dynamic Channel Time Allocation Scheme for Multimedia Traffic with Delay Bound in High-Rate Wireless PANs (고속율 무선 PAN에서 지연한도를 갖는 멀티미디어 트래픽을 위한 동적 채널시간할당 방법)

  • Kim Sun-Myeng;Cho Young-Jong
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.42 no.11
    • /
    • pp.1-12
    • /
    • 2005
  • In wireless personal area networks(PANs), the successful design of channel time allocation algorithm is a key factor in guaranteeing the various quality of service(QoS) requirements for the stringent real-time constraints of multimedia services. In this paper we propose a dynamic channel time allocation algerian for providing delay guarantees to multimedia traffics such as MPEG streams in the IEEE 802.15.3 high-rate WPANs. The dynamic algorithm exploits the characteristics of MPEG stream, wherein the devices (DEVs) send their channel time requests only at the end of superframe boundaries. The algerian uses mini packets for feedback control in order to deliver dynamic parameters for channel time requests from the DEVs to the piconet coordinator (PNC). In this scheme, the duration of channel time allocated to a DEV during a superframe is changed dynamically depending on the MPEG frame type, traffic load and delay bound of the frame, etc. Performance of the proposed scheme is investigated by simulation. Our results show that compared to traditional scheme, the proposed scheme is very effective and has high performance while guaranteeing the delay bound.

DiffServ-aware-MPLS Buffer Management Scheme for QoS Guarantee (QoS를 보장하기 위한 DiffServ-aware-MPLS 버퍼 관리 기법)

  • Han Cheol-min;Kim Byeon-gon;Jung Kwang-il;Kim Nam-hee;Park Hyeon;Chung Kyeong-teak;Chon Byeong-sil
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.41 no.6 s.324
    • /
    • pp.41-48
    • /
    • 2004
  • In an IP network, various types of traffics are statistically multiplexed to utilize efficiently the network resources. The DiffServ-aware-MPLS supports a wide variety of communication services with different QoS requirements. The DiffServ-aware-MPLS based on QoS architecture had become one of the most promising ways to guarantee QoS MulIti-service IP network. But how to manage IP network with QoS guarantee is still an open issue. In this paper, we propose DiffServ-aware-MPLS buffer management technique using the specified policing, queuing, and scheduling.

Protecting E-mail Server with Class-Based Rate Limiting Technique (클래스 기반의 대역 제한 기법을 통한 이메일 서버의 보호)

  • Yim, Kang-Bin;Lee, Chang-Hee;Kim, Jong-Su;Choi, Kyung-Hee;Jung, Gi-Hyun
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.41 no.6 s.324
    • /
    • pp.17-24
    • /
    • 2004
  • This paper proposes an efficient technique to protect e-mail server from DDoS attack using the CBQ (Class Based Queuing) algorithm The proposed method classifies incoming trafic to an e-mail server into three classes: 'more important mail traffic', 'less important traffic' and 'unknown traffic' and assigns bandwidths differently to the traffics. By differentiating the bandwidths of classes, normal mail traffic may flow even under DDoS attack in the proposed technique. The proposed technique is implemented on an embedded system which hires a switching processor with the WFHBD(Weighted Fair Hashed Bandwidth Distribution) engine that has been known as an efficient algorithm to distribute a given bandwidth to multiple sources, and it is verified that it can be an efficient way to protect e-mail server from DDoS attack.