• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.11
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• pp.70-77
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• 1998

Ni/SiC Schottky diodes have been fabricated using epitaxial 4H-SiC and 6H-SiC wafers. The epitaxial n-type layers were grown on $n^{+}$ substrates, with a doping density of 4.0$\times$10$^{16}$ c $m^{-3}$ and a thickness of 10${\mu}{\textrm}{m}$. Oxide-termination has been adopted in order to obtain high breakdown voltage and low leakage current. The fabricated Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes show excellent rectifying characteristics up to the measured temperature range of 55$0^{\circ}C$. In case of oxide-terminated Schottky barrier diodes, breakdown voltage of 973V(Ni/4H-SiC) and 920V(Ni/6H-SiC), and a very low leakage current of less than 1nA at -800V has been observed at room temperature. On non-terminated Schottky barrier diodes, breakdown voltages were 430V(Ni/4H-SiC) and 160v(Ni/6H-SiC). At room temperature, SBH(Schottky Barrier Height), ideality factor and specific on-resistance were 1.55eV, 1.3, 3.6$\times$10$^{-2}$ $\Omega$.$\textrm{cm}^2$ for Ni/4H-SiC Schottky barrier diodes, and 1.24eV, 1.2, 2.6$\times$10$^{-2}$$\Omega$.$\textrm{cm}^2$/ for Ni/SH-SiC Schottky barrier diodes, respectively. These results show that both Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes are very promising for high-temperature and high power applications.s..

• Proceedings of the Materials Research Society of Korea Conference
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• 1999.05a
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• pp.40-40
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• 1999

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.591-592
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• 2006

Schottky diodes for Radio-frequency identification (RFID) tag integration on chip were designed and fabricated using Samsung electronics System LSI standard $0.18{\mu}m$ CMOS process. Schottky diodes were designed as interdigitated fingers array by CMOS layout design rule. 64 types of Schottky diode were designed and fabricated with the variation of finger width, length and numbers with a $0.6{\mu}m$ guard ring enclosing n-well. Titanium was used as Schottky contact metal to lower the Schottky barrier height. Barrier height of the fabricated Schottky diode was 0.57eV. DC current - voltage measurements showed that the fabricated Schottky diode had a good rectifying properties with a breakdown voltage of -9.15 V and a threshold voltage of 0.25 V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.6
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• pp.367-371
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• 2018

1,200 V class junction barrier schottky (JBS) diodes and schottky barrier diodes (SBD) were simultaneously fabricated on the same 4H-SiC wafer. The resulting diodes were characterized at temperatures from room temperature to 473 K and subsequently compared in terms of their respective I-V characteristics. The parameters deduced from the observed I-V measurements, including ideality factor and series resistance, indicate that, as the temperature increases, the threshold voltage decreases whereas the ideality factor and barrier height increase. As JBS diodes have both Schottky and PN junction structures, the proper depletion layer thickness, $R_{on}$, and electron mobility values must be determined in order to produce diodes with an effective barrier height. The comparison results showed that the JBS diodes exhibit a larger effective barrier height compared to the SBDs.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.600-600
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• 2013

We have fabricated Cr nanodot Schottky diodes utilizing AAO templates formed on n-Si substrates. Three different sizes of Cr nanodots (about 75.0, 57.6, and 35.8 nm) were obtained by controlling the height of the AAO template. Cr nanodot Schottky diodes showed a rectifying behavior with low SBHs of 0.17~0.20 eV and high ideality factors of 5.6~9.2 compared to those for the bulk diode. Also, Cr nanodot Schottky diodes with smaller diameters yield higher current densities than those with larger diameters. These electrical behaviors can be explained by both Schottky barrier height (SBH) lowering effects and enhanced tunneling current due to the nanoscale size of the Schottky contact. Also, we have fabricated Cr-Si nanorod Schottky diodes with three different lengths (130, 220, and 330 nm) by dry etching of n-Si substrate. Cr-Si nanorod Schottky diodes with longer nanorods yield higher reverse current than those with shorter nanorods due to the enhanced electric field, which is attributed to a high aspect ratio of Si nanorod.

• Journal of the Semiconductor & Display Technology
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• v.14 no.1
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• pp.27-30
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• 2015

SiC based Schottky barrier diodes were prepared by using the facing targets sputtering method. In this research, 4H-SiC polytypes of SiC were adopted and Molybdenum, Titanium was employed as the Schottky metal of the metal-semiconductor contacts. Both structures showed the rectifying nature in their forward and reverse J-V characteristic curve and the ideality factors calculated from these plots that were close to unity were represented the nearly ideal behavior. Difference of Schottky barrier height between prepared devices was also corresponding with the electrical characteristics of themselves. Therefore the suitability of the facing targets sputtering method for fabrication of Schottky diodes could be suggested from these results.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.3
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• pp.101-107
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• 1990

In this work, one-dimensional simulation is carried out for PT-GaAs Schottky barrier diodes with finite difference method. Shockley's semiconductor governing equations: Poisson equation and current continuity equation are discertized, and linearized by Newton-Raphson method. The linear system of equation is solved by Gaussian elimination method until convergence is achieved. The boundary condition for this equation is taken from thermionic emission-diffusion theory. Simulation is done for PT-GaAs epitaxial-layer Schottky barrier diodes. The claculated results of electron and potential distribution are shown. Simulation results show exellent agreement with experiments.

• Journal of IKEEE
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• v.26 no.2
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• pp.306-312
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• 2022

We investigated electrical properties and deep level traps in 4H-SiC merged PiN Schottky (MPS) diodes with different barrier heights by different PN ratios and metallization annealing temperatures. The barrier heights of MPS diodes were obtained in IV and CV characteristics. The leakage current increased with the lowering barrier height, resulting in 10 times larger current. Additionally, the deep level traps (Z_1/2 and RD_1/2) were revealed by deep level transient spectroscopy (DLTS) measurement in four MPS diodes. Based on DLTS results, the trap energy levels were found to be shallow level by 22~28% with lower barrier height It could confirm the dependence of the defect level and concentration determined by DLTS on the Schottky barrier height and may lead to incorrect results regarding deep level trap parameters with small barrier heights.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.1
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• pp.71-76
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• 1994

Schottky diodes have been fabricated using the SDB wafer, and their characteristics have been investigated. For comparison, conventional planar and etched most structure were made on the same substrate. The ideality factor and barrier height of the fabricated devices are found to be 1.03 and 0.77eV, respectively. Breakdown volttge of the etched mesa Schottky diode has been increased to 180V. whereas it is 90V for the planar diode. Schottky diode with an etched mesa exhibits twice improvement in breaktown voltage.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.205-208
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• 2001

Schottky barrier diodes are fabricated on a intrinsic GaN(4${\mu}{\textrm}{m}$) epitaxial structure grown by rf plasma molecular beam epitaxy (MBE) on sapphire substrates. First, We make Ohmic electrodes (Ti/Al/Ti/Au) by evaporator. Next, we contact RuO$_2$ by dipping in the solution (RuCl$_3$.HClO$_4$), and then we deposit Ni/Au on the surface of RuO$_2$ by evaporator. We study the electrical characteristics of GaN Schottky barrier diodes made by these methods. Measurements are C-V, I-V, SEM, EDX, and XRD for the characteristics of devices. Thickness of RuO$_2$ layer depends on supplied voltage and dipping time. Device of thinner RuO$_2$ layer have a good Schottky characteristics compare with device of thicker RuO$_2$ layer