• Journal of the Korean Vacuum Society
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• v.7 no.1
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• pp.29-34
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• 1998

The solid-phase crystallization (SPC) of plasma-enhanced chemical vapor depsoited (PECVD) amorphous silicon (a-Si) films ha s been investigated by x-ray diffraction (XRD). The a-Si films were prepared on Si (100) wafers using $SiH_4$ gas and without $H_2$ dilution at the substrate temperatures between $120^{\circ}C$ and $380^{\circ}C$, and than annealed at $600^{\circ}C$ for crystallization. The annealed samples exhibited (111), (220), and (311) XRD peaks with preferential orientation of (111). The XRD peak intensities increased as the substrate temperature decreased, and the $H_2$dilution suppressed the solid-phase crystallization. The average grain size estimated by XRD analysis for the (111) texture has increased from about 10 nm to about 30 nm, as the substrate temperature decreased. The deposition rate also increased with the decreasing substrate temperature and the grain size was closely dependent on the deposition rate of the films. The grain size enhancement was attributed to an increase of the structural disorder of the Si network.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.05a
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• pp.42-45
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• 1992

The poly silicon thin films were prepared by solid phase crystallization at 600$^{\circ}C$ of amorphous silicon films deposited on Corning 7059 glass and (100) silicon wafer with thermally grown SiO$_2$substrate by plasma enhanced chemical vapor deposition with varying rf power, deposition temperature, total flow rate. Crystallization time, microstructure, absorption coefficients were investigated by RAMAN, XRD analysis and UV transmittance measurement. Crystallization time of amorphous silicon films was increased with increasing rf power, decreasing deposition temperature and decreasing total flow rate.

• Journal of the Korean institute of surface engineering
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• v.47 no.1
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• pp.20-24
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• 2014

Joule heat is generated by applying an electric filed to a conductive layer located beneath or above the amorphous silicon film, and is used to raise the temperature of the silicon film to crystallization temperature. An electric field was applied to an indium tin oxide (ITO) conductive layer to induce Joule heating in order to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced within the range of a millisecond. To investigate the kinetics of Joule-heating induced crystallization (JIC) solid phase crystallization was conducted using amorphous silicon films deposited by plasma enhanced chemical vapor deposition and using tube furnace in nitrogen ambient. Microscopic and macroscopic uniformity of crystallinity of JIC poly-Si was measured to have better uniformity compared to that of poly-Si produced by other methods such as metal induced crystallization and Excimer laser crystallization.

• Journal of the Korean Vacuum Society
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• v.14 no.1
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• pp.24-28
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• 2005

A typical method for obtaining poly-Si films is the solid phase crystallization(SPC) of amorphous Si. Advantages of SPC are uniformity, process quality and low cost of production. However, high process temperature and long process time prevent the employment of SPC process on thermally susceptible glass substrate. In this parer, we propose a new method that applies an alternating magnetic field during crystallization annealing in an alternating magnetic field crystallization(AMFC) system for lowering process temperature and shorter process time of SPC. When we crystallized, in the case of SPC, annealing time is 24 hours at 570℃. But in the case of AMFC, annealing time is only 20 minutes at the same temperature.

• Journal of Information Display
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• v.4 no.1
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• pp.34-37
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• 2003

We investigate the solid phase crystallization of amorphous Si films on glass substrates under alternating magnetic field induction. The kinetics of crystallization are found to be greatly enhanced by alternating magnetic field. While complete crystallization takes heat treatment of more than 14 hours at 570$^{\circ}C$, it can be reduced by applying the megnetic field to 20 minutes. It is assumed that the enhancement of crystallization is associated with an electromotive force voltage generated by alternating magnetic field. This electric field applied in the amorphous Si may possibly be the reason for acceleration of the atomic mobility of crystallization through the modification of atomic potentials

• Korean Membrane Journal
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• v.9 no.1
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• pp.27-33
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• 2007

PVDF membrane formation via TIPS was performed for PVDF/DBP and PVDF/DMP systems. PVDF/DBP system showed solid-liquid phase separation behavior, while PVDF/DMP system has liquid-liquid phase separation characteristic as well as solid-liquid phase separation characteristic. PVDF contents and cooling conditions had great influence on structure, and the effects of each parameter were examined. Spherulitic structure was obtained due to the dominant PVDF crystallization. Diluent rejected to the outside of spherulite occupied the surface of the PVDF spherulites to result in the microporous spherulite formation and micro-void between spherulites. PVDF/DMP system had competitive solid-liquid and liquid-liquid phase separation depending on the cooling path.

• Journal of the Korean Vacuum Society
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• v.4 no.1
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• pp.77-84
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• 1995

LCD용 다결정 실리콘 TFT의 제조에 요구되는 고품위의 다결정 실리콘 박막을 60미만의 저온 공정으로 제조하는 기술로 비정질 박막의 고상 결정화(solid phase crystallization) 가 유망하다. 본 연구에서는 고진공 화학증착기를 이용하여 증착된 비정질 실리콘 막의 고상결정거동에 대해 연구하였다. 고상 결정화 속도 및 결정화 후의 결정성(결정립 크기 및 결함 밀도) 화학증착시의 증착가스의 종류(SiH4 혹은 Si2H6), 공정 압력, 증착 온도 등에 민감한 영향을 받으며 Si2H6가스의 사용, 증착 압력의 증가, 증착온도의 감소는 최종 결정립의 크기를 현저히 증가시킨다. 또한 증착전의 기초 진공도를 높임으로써 반응기 잔류 가스에 의한 산소나 탄소 등의 막내 유입이 감소되어 결정화 속도가 증가하고 결정성이 향상되었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.89-93
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• 1995

Effects of hydrogenation in amorphous silicon rile growths on Solid Phase Crystallization (SPC) was investigated using x-ray diffractometry, energy dispersive Spectroscopy, and Raman spectrum. Interdiffusion of barium(Ba) and aluminum(Al) compounds of corning substrate was observed in both of rf sputtering and LFCVD films under the low temperature(580$^{\circ}C$) annealing. Low degree of crystallinity resulted from the interdiffusion was obtained. Highly applicable degree of crystallinity was obtained through the mechanical damage induced surface activation on amorphous silicon films. X-ray diffraction intensity of (111) orientation was used to characterize the degree of crystallinity of SPC. Nucleation and growth rate in SPC could be controllable through the employed surface treatment. IIydrogenated LPCVD films showed the superior crystallinity to non-hydrogenated sputtering films. Insignificant effects of activation treatment in sputtered film was of activation treatment in sputtered film was observed on SPC.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.60-61
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• 2007

In this paper, the p-channel poly Si thin-film transistors (Poly-Si TFT's) using formed by solid phase crystallization (SPC) on glass substrate were fabricated. And we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's to indicate non-volatile memory (NVM) effect. Poly-Si TFT is investigated by measuring the electrical properties of poly-Si films, such as I-V characteristics, on/off current ratio. NVM characteristics is showed by measuring the threshold voltage change of TFT through I-V characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.6
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• pp.462-465
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• 2009

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method, The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than 10), Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.