• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.80-81
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• 2008

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.1
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• pp.26-32
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• 2003

Then-channel poly-Si thin-film transistors (poly-Si TFT's) formed by solid phase crystallization (SPC) method on glass were measured to obtain the electrical parameters such as of I-V characteristics, mobility, leakage current, threshold voltage, and subthreshold slope. Then, devices were analyzed to obtain the reliability and appliability on TFT-LCD with large-size and high density. In n-channel poly-Si TFT with 5$\mu\textrm{m}$/2$\mu\textrm{m}$, 8$\mu\textrm{m}$, 30$\mu\textrm{m}$ devices of channel width/length, the field effect mobilities are 111, 116, 125 $\textrm{cm}^2$/V-s and leakage currents are 0.6, 0.1, and 0.02 pA/$\mu\textrm{m}$, respectively. Low threshold voltage and subthreshold slope, and good ON-OFF ratio are shown, as well. Thus. the poly-Si TFT's used by SPC are expected to be applied on TFT-LCD with large-size and high density, which can integrate the display panel and peripheral circuit on a targe glass substrate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.199-199
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• 2008

이 실험은 NVM의 Oxide, Nitride, Oxide nitride층별 blocking, trapping and tunneling 속성에 대해서 밝히고자 한다. gate 전극은 값싸고 전도도가 좋은 알루미늄을 사용한다. 유리기판위에 Silicon nitride층을 20nm로 코팅하고 Silicon dioxide층을 10nm로 코팅한다. 그리고 amorphous Silicon material이 증착된다. Poly Silicon은 Solid Phase Crystallization 방법을 사용하였다. 마지막 공정으로 p-doping은 ion shower에 의한 방법으로 drain과 source 전극을 생성하였다. gate가 biasing 될 때, p-channel은 source와 drain 사이에서 형성된다. Oxide Nitride Oxide nitride (ONO) 층은 각각 12.5nm/20nm/2.3nm의 두께로 만들었다. 전하는 Program process 중에 poly Silicon층에서 Silicon Oxide nitride tunneling층을 통하여 움직이게 된다. 그리고 전하들은 Silicon Nitride층에 머무르게 된다. 그 전하들은 erasing process 중에 trapping 층에서 poly Silicon 층으로 되돌아 간다. Silicon Oxide blocking층은 trapping층으로 전하가 나가는 것을 피하기 위하여 더해진다. 이 논문에서 Programming process와 erasing process의 Id-Vg 특성곡선을 설명한다. Programming process에 positive voltage를 또는 erasing process에 negative voltage를 적용할 때, Id-Vg 특성 곡선은 왼쪽 또는 오른쪽으로 이동한다. 이 실험이 보여준 결과값에 의해서 10년 이상의 저장능력이 있는 메모리를 만들 수 있다. 그러므로, NVM의 중요한 두 가지 성질은 유지성과 내구성이다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.480.1-480.1
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• 2014

In this study, we suggest the new emitter formation applied solid phase epitaxy (SPE) growth process using rapid thermal process (RTP). Preferentially, we describe the SPE growth of intrinsic a-Si thin film through RTP heat treatment by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD). Phase transition of intrinsic a-Si thin films were taken place under $600^{\circ}C$ for 5 min annealing condition measured by spectroscopic ellipsometer (SE) applied to effective medium approximation (EMA). We confirmed the SPE growth using high resolution transmission electron microscope (HR-TEM) analysis. Similarly, phase transition of P doped a-Si thin films were arisen $700^{\circ}C$ for 1 min, however, crystallinity is lower than intrinsic a-Si thin films. It is referable to the interference of the dopant. Based on this, we fabricated 16.7% solar cell to apply emitter layer formed SPE growth of P doped a-Si thin films using RTP. We considered that is a relative short process time compare to make the phosphorus emitter such as diffusion using furnace. Also, it is causing process simplification that can be omitted phosphorus silicate glass (PSG) removal and edge isolation process.

• Bulletin of the Korean Chemical Society
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• v.20 no.5
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• pp.517-524
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• 1999

By heating the magnesiumsilicate (Mg2SiO4:forsterite) xerogel in carbon dioxide, carbonaceous component was intentionally introduced into the amorphous solid precursor. Carbon was introduced homogeneously as unidentate carbonate. Upon being heated at 800 。C in carbon dioxide, the xerogel which had homogeneously distributed carbonaceous component in it crystallized into a single phase product of a new crystalline material, which had approximate composition of Mg8Si4Ol8C. The powder X-ray diffraction pattern of the new crystalline material did not match with any known crystalline compound registered in the powder diffraction file. Crystallization from amorphous xeroget to the new crystalline phase occurred in a very narrow range of temperature, from 750 。C to 850 。C in carbon dioxide, or in dty oxygen. Upon being heated above 850 。C, carbonaceous component was expelled from the product, accompanied by irreversible transition from the new crystalline material to forsterite.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.356-356
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• 2013

Monolithic 3D-IC는 현대 집적회로에서 interconnect로 인해 발생되는 여러 문제들을 해결하기 위해 새롭게 제시되고 있는 기술적 개념으로 구현 시 하위 소자 및 interconnet들에 영향을 주지 않는 저온공정이 필수적이다. 특히 germanium (Ge)은 낮은 녹는점 및 높은 캐리어 이동도 덕분에 3D-IC 구현 시 상위 소자의 channel 물질에 적합한 것으로 알려져 있다. 최근 이러한 Ge을 결정화하기 위해 solid phase crystallization (SPC), metal induced crystallization (MIC), laser annealing과 같은 결정화 방법들이 보고되고 있다. 현재까지 SPC 방법에 의해 얻어진 poly-Ge의 도핑농도 및 이동도와 같은 전기적 특성에 대한 분석은 수행된 바 있으나 3D-IC 공정에 적용이 가능한 MIC 기술을 통해 얻어진 poly Ge 필름에 대한 전기적 특성분석은 부족한 상황이다. 본 연구는 SPC 뿐만 아니라 MIC 방법을 통해 ${\alpha}$-Ge를 결정화시키고 얻어진 poly-Ge 필름의 전기적 특성을 XRD 및 hall effect measurement를 통해 분석하였다. 특히 일반적으로 Ge 내에서 p-type dopant로 동작을 하는 defect과 n-type dopant인 phosphorus 관계를 고려하여 여러 온도에서 SPC 및 MIC에 의해 얻어진 phosphorus doped poly-Ge 필름들의 전기적 특성을 분석하였다.

• Applied Chemistry for Engineering
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• v.4 no.1
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• pp.94-102
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• 1993

The effects of temperature and of $Na_2O$ and $SiO_2$ contents on the crystallization of zeolite A were studied, by examining crystallization curves and particle size distributions of final products at various crystallization conditions. Crystallization process could be simulated adopting the assumptions of constant linear growth rate and equilibrium between amorphous solid phase and soluble species. Rate constants were determined by comparing the simulated crystallization curves with experimental data. Rate constant for linear growth increased with temperature and crystallization rate at different mole ratio of $Na_2O/H_2O$ correlated reasonably well with increase of soluble species. The rate constant of crystallization did not increase with increase in mole ratio of $Na_2O/H_2O$, but the rate of nuclei formation and the fraction of soluble species were enhanced. The rate constants for linear growth of zeolite A were determined as $0.07{\sim}0.24{\mu}m{\cdot}min^{-1}$ at these experimental conditions Apparent activation energy was estimated as $49kJ{\cdot}mol^{-1}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.345-345
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• 2010

1T-DRAM cell with solid phase (SPC) crystallized poly-Si thin film transistor was fabricated and electrical characteristics were evaluated. The fabricated device showed kink effect by negative back bias. Kink current is due to the floating body effect and it can be used to memory operation. Current difference between "1" state and "0" state was defined and the memory properties can be improved by using gate induced drain leakage (GIDL) current.

• Journal of the Korean Applied Science and Technology
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• v.35 no.1
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• pp.214-222
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• 2018

Alane(aluminum trihydride, $AlH_3$) is a candidate material involving high energetic capacity for solid propellant or explosives. In this study aluminum trihydride-etherate ($AlH_3{\cdot}(C_2H_5)_2O$) was synthesized through a wet process, and solid alane was extracted by controlled crystallization. Alane crystals were grown during the crystallization step with phase conversion of aluminum trihydride-etherate to alane using an anti-solvent. Stable crystal forms were found by a 2 hour crystallization process at $85^{\circ}C$. Finally the extracted solid aluminium trihydride consisted mainly of ${\gamma}-type$ with $50-100{\mu}m$ in size.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.1-4
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• 2008

The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.