• 제목/요약/키워드: vertical nanowire

검색결과 17건 처리시간 0.031초

Vertically-Aligned Nanowire Arrays for Cellular Interfaces

  • 김성민;이세영;강동희;윤명한
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.90.2-90.2
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    • 2013
  • Vertically-aligned silicon nanostructure arrays (SNAs) have been drawing much attention due to their useful electrical properties, large surface area, and quantum confinement effect. SNAs are typically fabricated by chemical vapor deposition, reactive ion etching, or wet chemical etching. Recently, metal-assisted chemical etching process, which is relatively simple and cost-effective, in combination with nanosphere lithography was recently demonstrated for vertical SNA fabrication with controlled SNA diameters, lengths, and densities. However, this method exhibits limitations in terms of large-area preparation of unperiodic nanostructures and SNA geometry tuning independent of inter-structure separation. In this work, we introduced the layerby- layer deposition of polyelectrolytes for holding uniformly dispersed polystyrene beads as mask and demonstrated the fabrication of well-dispersed vertical SNAs with controlled geometric parameters on large substrates. Additionally, we present a new means of building in vitro neuronal networks using vertical nanowire arrays. Primary culture of rat hippocampal neurons were deposited on the bare and conducting polymer-coated SNAs and maintained for several weeks while their viability remains for several weeks. Combined with the recently-developed transfection method via nanowire internalization, the patterned vertical nanostructures will contribute to understanding how synaptic connectivity and site-specific perturbation will affect global neuronal network function in an extant in vitro neuronal circuit.

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ZnO Nanowire를 이용한 2D 배열 구조 제작

  • 임영택;노임준;신백균
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.603-603
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    • 2013
  • 3D 배열구조의 Vertical nanowire Integrated Nanogenerator (VING)은 낮은 출력, 유연 기판 상에 부적합, 나노선의 부서지기 쉬움, 장기 안정성, 균일한 나노선의 성장을 필요로 하는 문제점을 가지고 있다. 본 연구에서는 이러한 VING방식의 단점을 보완하여 2D 배열 구조의 Lateral nanowire Integrated Nanogenerator (LING)로 고출력 전압, 유연기판의 상에 적합 등을 개선하는 방향으로 연구를 하였다. 본 연구의 실험 방법으로는 RF magnetron sputter를 이용하여 AZO Seedlayer를 제작하였으며 제작된 AZO Seedlayer를 photolithography 공정으로 제작하였다. 패터닝된 샘플을 Hydro thermal synthesis method로 성장시켰다. 구조적 분석으로는 XRD, FE-SEM 등을 이용하여 측정하였다.

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O2 plasma를 이용한 Flexible ZnO nanogenerator 특성 향상 연구

  • 강물결;박성확;주병권;이철승
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.283.1-283.1
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    • 2013
  • ZnO nanowire를 기반으로 하는 nanogenerator는 미세한 움직임을 전기 에너지로 변환 시키는 압전 에너지 하베스팅 기술로 기존 에너지 하베스터와 비교하여 사용환경의 제약이 적고, 소형화가 가능한 장점으로 주목을 받고 있다. 특히 혈류, 심장박동, 호흡 등 인체 활동 에너지를 이용한 발전 소자 등의 활용이 가능하여 활발한 연구가 진행되고 있다. 하지만, 최근 발표된 film like Vertical 구조의 nanogenerator는 nanowire의 구조 취약성으로 인해 내구성이 좋지 못한 단점이 있다. 또한 ZnO nanowire의 내부 O2 결함 및 표면 OH-기의 흡착에 의한 특성 저하가 나타난다. 본 연구에서는 nanogenerator의 내구성을 향상시키기 위해 capping layer로 실리콘 계 유무기 하이브리드를 적용하여 코팅 물질 및 코팅 방법을 최적화 하였으며 상부 전극을 CNT-Ag nanowire 소재로 대체하여 유연기판에 대응코자 하였다. 또한 APP(Atmosphere Pressure Plasma)와 ICP(Inductively Coupled Plasma)장비를 사용하여 ZnO nanowire를 표면처리하였고, 각각의 플라즈마 표면처리의 영향에 대해 조사하였다. XPS를 통하여 OH-기의 제거 유무를 확인하였으며, 소자의 발전 특성의 향상을 확인 하였다.

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Applications of Nanowire Transistors for Driving Nanowire LEDs

  • Hamedi-Hagh, Sotoudeh;Park, Dae-Hee
    • Transactions on Electrical and Electronic Materials
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    • 제13권2호
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    • pp.73-77
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    • 2012
  • Operation of liquid crystal displays (LCDs) can be improved by monolithic integration of the pixel transistors with light emitting diodes (LEDs) on a single substrate. Conventional LCDs make use of filters to control the backlighting which reduces the overall efficiency. These LCDs also utilize LEDs in series which impose failure and they require high voltage for operation with a power factor correction. The screen of small hand-held devices can operate from moderate brightness. Therefore, III-V nanowires that are grown along with transistors over Silicon substrates can be utilized. Control of nanowire LEDs with nanowire transistors will significantly lower the cost, increase the efficiency, improve the manufacturing yield and simplify the structure of the small displays that are used in portable devices. The steps to grow nanowires on Silicon substrates are described. The vertical n-type and p-type nanowire transistors with surrounding gate structures are characterized. While biased at 0.5 V, nanowire transistors with minimum radius or channel width have an OFF current which is less than 1pA, an ON current more than 1 ${\mu}A$, a total delay less than 10 ps and a transconductance gain of more than 10 ${\mu}A/V$. The low power and fast switching characteristics of the nanowire transistor make them an ideal choice for the realization of future displays of portable devices with long battery lifetime.

Design of Next Generation Amplifiers Using Nanowire FETs

  • Hamedi-Hagh, Sotoudeh;Oh, Soo-Seok;Bindal, Ahmet;Park, Dae-Hee
    • Journal of Electrical Engineering and Technology
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    • 제3권4호
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    • pp.566-570
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    • 2008
  • Vertical nanowire SGFETs(Surrounding Gate Field Effect Transistors) provide full gate control over the channel to eliminate short channel effects. This paper presents design and characterization of a differential pair amplifier using NMOS and PMOS SGFETs with a 10nm channel length and a 2nm channel radius. The amplifier dissipates $5{\mu}W$ power and provides 5THz bandwidth with a voltage gain of 16, a linear output voltage swing of 0.5V, and a distortion better than 3% from a 1.8V power supply and a 20aF capacitive load. The 2nd and 3rd order harmonic distortions of the amplifier are -40dBm and -52dBm, respectively, and the 3rd order intermodulation is -24dBm for a two-tone input signal with 10mV amplitude and 10GHz frequency spacing. All these parameters indicate that vertical nanowire surrounding gate transistors are promising candidates for the next generation high speed analog and VLSI technologies.

Intracellular Electrical Stimulation on PC-12 Cells through Vertical Nanowire Electrode

  • Kim, Hyungsuk;Kim, Ilsoo;Lee, Jaehyung;Lee, Hye-young;Lee, Eungjang;Jeong, Du-Won;Kim, Ju-Jin;Choi, Heon-Jin
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.407-407
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    • 2014
  • Nanotechnology, especially vertically grown silicon nanowires, has gotten great attentions in biology due to characteristics of one dimensional nanostructure; controllable synthetic structure such as lengths, diameters, densities. Silicon nanowires are promising materials as nanoelectrodes due to their highly complementary metal-oxide-semiconductor (CMOS) - and bio-compatibility. Silicon nanowires are so intoxicated that are effective for bio molecular delivery and electrical stimulation. Vertical nanowires with integrated Au tips were fabricated for electrical intracellular interfacing with PC-12 cells. We have made synthesized two types of nanowire devices; one is multi-nanowires electrode for bio molecular sensing and electrical stimulation, and the other is single-nanowires electrode respectively. Here, we demonstrate that differentiation of Nerve Growth Factor (NGF) treated PC-12 cells can be promoted depending on different magnitudes of electrical stimulation and density of Si NWs. It was fabricated by both bottom-up and top-down approaches using low pressure chemical vapor deposition (LPCVD) with high vacuuming environment to electrically stimulate PC-12 cells. The effects of electrical stimulation with NGF on the morphological differentiation are observed by Scanning Electron Microscopy (SEM), and it induces neural outgrowth. Moreover, the cell cytosol can be dyed selectively depending on the degree of differentiation along with fluorescence microscopy measurement. Vertically grown silicon nanowires have further expected advantages in case of single nanowire fabrication, and will be able to expand its characteristics to diverse applications.

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비대칭 소스/드레인 수직형 나노와이어 MOSFET의 1T-DRAM 응용을 위한 메모리 윈도우 특성 (Memory window characteristics of vertical nanowire MOSFET with asymmetric source/drain for 1T-DRAM application)

  • 이재훈;박종태
    • 한국정보통신학회논문지
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    • 제20권4호
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    • pp.793-798
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    • 2016
  • 본 연구에서는 1T-DRAM 응용을 위해 Bipolar Junction Transistor 모드 (BJT mode)에서 비대칭 소스/드레인 수직형 나노와이어 소자의 순방향 및 역방향 메모리 윈도우 특성을 분석하였다. 사용된 소자는 드레인 농도가 소스 농도보다 높으며 소스 면적이 드레인 면적보다 큰 사다리꼴의 수직형 gate-all-around (GAA) MOSFET 이다. BJT모드의 순방향 및 역방향 이력곡선 특성으로부터 순방향의 메모리 윈도우는 1.08V이고 역방향의 메모리 윈도우는 0.16V이었다. 또 래치-업 포인트는 순방향이 역방향보다 0.34V 큰 것을 알 수 있었다. 측정 결과를 검증하기 위해 소자 시뮬레이션을 수행하였으며 시뮬레이션 결과는 측정 결과와 일치하는 것을 알 수 있었다. 1T-DRAM에서 BJT 모드를 이용하여 쓰기 동작을 할 때는 드레인 농도가 높은 것이 바람직함을 알 수 있었다.

단채널 현상을 줄이기 위한 수직형 나노와이어 MOSFET 소자설계 (Device Design of Vertical Nanowire MOSFET to Reduce Short Channel Effect)

  • 김희진;최은지;신강현;박종태
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2015년도 추계학술대회
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    • pp.879-882
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    • 2015
  • 본 연구에서는 시뮬레이션을 통해 채널 폭과 채널 도핑 형태에 따른 수직형 나노와이어 GAA MOSFET의 특성을 비교, 분석하였다. 첫 번째로, 드레인의 끝부분을 20nm로 고정시키고 소스의 끝부분이 30nm, 50nm, 80nm, 110nm로 식각된 모양으로 설계한 구조의 특성을 비교, 분석하였다. 두 번째로는 드레인, 채널, 소스의 폭이 50nm로 일정한 직사각형 모양의 구조를 설계하였다. 이 구조를 기준으로 삼아 드레인의 끝부분이 20nm가 되도록 식각된 사다리꼴 모양과 반대로 소스의 끝부분이 20nm가 되도록 식각된 역 사다리꼴 모양의 구조를 설계하여 위 세 구조의 특성을 비교, 분석하였다. 마지막으로는 폭 50nm의 직사각형 구조의 채널을 다섯 구간으로 나누어 도핑 형태를 다양하게 변화시킨 것의 특성을 비교, 분석하였다. 첫 번째 시뮬레이션에서는 채널 폭이 가장 작을 때, 두 번째 시뮬레이션에서는 사다리꼴 모양의 구조일 때, 세 번째 시뮬레이션에서는 채널의 중앙 부분이 높게 도핑 되었을 때 가장 좋은 특성을 보였다.

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Novel Enhanced Flexibility of ZnO Nanowires Based Nanogenerators Using Transparent Flexible Top Electrode

  • 강물결;하인호;김성현;조진우;주병권;이철승
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.490.1-490.1
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    • 2014
  • The ZnO nanowire (NW)-based nanogenerators (NGs) can have rectifying current and potential generated by the coupled piezoelectric and semiconducting properties of ZnO by variety of external stimulation such as pushing, bending and stretching. So, ZnO NGs needed to enhance durability for stable properties of NGs. The durability of the metal electrodes used in the typical ZnO nanogenerators(NGs) is unstable for both electrical and mechanical stability. Indium tin oxide (ITO) is used as transparent flexible electrode but because of high cost and limited supply of indium, the fragility and lack of flexibility of ITO layers, alternatives are being sought. It is expected that carbon nanotube and Ag nanowire conductive coatings could be a prospective replacement. In this work, we demonstrated transparent flexible ZnO NGs by using CNT/Ag nanowire hybrid electrode, in which electrical and mechanical stability of top electrode has been improved. We grew vertical type ZnO NW by hydrothermal method and ZnO NW was coated with hybrid silicone coating solution as capping layer to enhance adhesion and durability of ZNW. We coated the CNT/Ag nanowire hybrid electrode by using bar coating system on a capping layer. Power generation of the ZnO NG is measured by using a picoammeter, a oscilloscope and confirmed surface condition with FE-SEM. As a results, the NGs using the CNT/Ag NW hybrid electrode show 75% transparency at wavelength 550 nm and small change of the resistance of the electrode after bending test. It will be discussed the effect of the improved flexibility of top electrode on power generation enhancement of ZnO NGs.

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Selective Growth of Nanosphere Assisted Vertical Zinc Oxide Nanowires with Hydrothermal Method

  • Lee, Jin-Su;Nam, Sang-Hun;Yu, Jung-Hun;Yun, Sang-Ho;Boo, Jin-Hyo
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.252.2-252.2
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    • 2013
  • ZnO nanostructures have a lot of interest for decades due to its varied applications such as light-emitting devices, power generators, solar cells, and sensing devices etc. To get the high performance of these devices, the factors of nanostructure geometry, spacing, and alignment are important. So, Patterning of vertically- aligned ZnO nanowires are currently attractive. However, many of ZnO nanowire or nanorod fabrication methods are needs high temperature, such vapor phase transport process, metal-organic chemical vapor deposition (MOCVD), metal-organic vapor phase epitaxy, thermal evaporation, pulse laser deposition and thermal chemical vapor deposition. While hydrothermal process has great advantages-low temperature (less than $100^{\circ}C$), simple steps, short time consuming, without catalyst, and relatively ease to control than as mentioned various methods. In this work, we investigate the dependence of ZnO nanowire alignment and morphology on si substrate using of nanosphere template with various precursor concentration and components via hydrothermal process. The brief experimental scheme is as follow. First synthesized ZnO seed solution was spun coated on to cleaned Si substrate, and then annealed $350^{\circ}C$ for 1h in the furnace. Second, 200nm sized close-packed nanospheres were formed on the seed layer-coated substrate by using of gas-liquid-solid interfacial self-assembly method and drying in vaccum desicator for about a day to enhance the adhesion between seed layer and nanospheres. After that, zinc oxide nanowires were synthesized using a low temperature hydrothermal method based on alkali solution. The specimens were immersed upside down in the autoclave bath to prevent some precipitates which formed and covered on the surface. The hydrothermal conditions such as growth temperature, growth time, solution concentration, and additives are variously performed to optimize the morphologies of nanowire. To characterize the crystal structure of seed layer and nanowires, morphology, and optical properties, X-ray diffraction (XRD), field emission scanning electron microscopy (FE-SEM), Raman spectroscopy, and photoluminescence (PL) studies were investigated.

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