• Journal of information and communication convergence engineering
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• v.13 no.2
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• pp.139-143
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• 2015

A push-push voltage controlled dielectric resonator oscillator (VCDRO) with a modified frequency tuning structure using broadside couplers is investigated. The push-push VCDRO designed at 16 GHz is manufactured using a low temperature co-fired ceramic (LTCC) technology to reduce the circuit size. The frequency tuning structure using a broadside coupler is embedded in a layer of the A6 substrate by using the LTCC process. Experimental results show that the fundamental and third harmonics are suppressed above 15 dBc and 30 dBc, respectively, and the phase noise of push-push VCDRO is -97.5 dBc/Hz at an offset frequency of 100 kHz from the carrier. The proposed frequency tuning structure has a tuning range of 4.46 MHz over a control voltage of 1-11 V. This push-push VCDRO has a miniature size of 15 mm×15 mm. The proposed design and fabrication techniques for a push-push oscillator seem to be applicable in many space and commercial VCDRO products.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1885-1890
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• 2003

In this paper, we have developed the voltage controlled crystal oscillator (VCXO) with positive emitter coupled logic(PECL). The VCXO is a crystal oscillator which includes a varactor diode and associated circuitry allowing the frequency to be changed by application of a voltage across that diode. The characteristics of the PECL has the delay time less than 2 ns and the faster logic gate, and the high level output greater than 2.3 V and the low level output smaller than 1.68 V.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.5
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• pp.863-871
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• 2003

In this paper, we design a high stable Ku-band phase-locked dielectric resonant microwave oscillator with the gate voltage controls of p-HEMT. By adapting the nonlinear equivalent elements which affects phase noise of microwave oscillator, we optimize the nonlinear elements of p-HEMT to have low phase noise operation. Using the scattering parameters according to bias voltages, we designed the gate voltage control microwave dielectric resonant oscillator and phase-locked loop circuits is applied to have the high stable operations. Designed microwave oscillator as a local oscillator of digital microwave communication shows that output power is 9.17dBm at 10.75GHz and it's phase noise is -88dBc/Hz at 10KHz offset frequency.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.41-44
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• 2001

본 논문은 액정 Driver IC에 사용되a는 내부 기준 clock 발생 및 Voltage Converter에 boosting을 하기 위한 clock을 제공하는 Oscillator 설계 및 구현 하였다 LCD Driver IC에서 발생되는 Oscillator clock 은 고속의 clock신호는 필요로 하지 않으나 LCD display에 관련된 frame 주파수에 직접적인 영향을 주므로 중심 주파수 결정 및 duty비에 따른 주파수 제어가 매우 중요하다. 본 논문에서는 가변 duty를 적용하는 LCD system에 적용할 수 있는 가변 duty oscillator를 소개한다. Process는 0.35um, 12V공정을 사용하였다.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.233-236
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• 2005

Phase noise in a phase-locked-loop (PLL) is unwanted and unavoidable. It is a main concern in oscillation system especially PLL. The phase noise is derived in term of power spectrum density by using a reliable phase noise model. There are four noise sources being considered in this paper, which are generated by reference oscillator, voltage controlled oscillator, filter, and main divider. The major concern for this paper is the noise from the filter. Two types of second order low pass filter are used in the PLL system. Applying the mathematical phase noise model, the output noises are compared. The total noise from the passive filter is lower than the active filter at the offset frequency range between 1 Hz to 33 kHz.

• Journal of IKEEE
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• v.24 no.4
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• pp.975-981
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• 2020

A 10 GHz LC voltage-controlled oscillator (VCO), which controls an amplitude of output signal, is proposed to improve the phase noise. The proposed amplitude control circuit for the LC VCO consists of a peak detector, an amplifier, and a current source. The peak detector is performed detecting the lowest voltage of the output signal by using two diode-connected NMOSFET and a capacitor. The proposed 10 GHz LC VCO with an amplitude control circuit for output signal is designed using a 55 nm CMOS process with a supply voltage of 1.2 V. Its area is 0.0785 ㎟. The amplitude control circuit used in the proposed LC VCO reduces the amplitude variation 242 mV generated in the output signal of the conventional LC VCO to 47 mV. Furthermore, it improves the peak-to-peak time jitter from 8.71 ps to 931 fs.

• Journal of the Korean Institute of Telematics and Electronics
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• v.11 no.6
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• pp.16-24
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• 1974

In this paper the method of constructing short and open stable voltage inversion negative immittance converter (VNIC) circuits is proposed according to simplified equivalent models witch consist of a parameter control circuit, and a voltage or a current control circuit. VNIC characteristics can be obtained as gate voltage of common gate connection is controlled by the output of the parameter control circuit corresponding to its input. Constructed circuits are analysed, and the experimental results are compared and cheeked with the calculated results. Errors are found less than 11%. Oscillation behavior of constructed VNIC oscillator is compared with that of negative resistance oscillator.

• The Journal of the Acoustical Society of Korea
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• v.16 no.4
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• pp.76-84
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• 1997

In this paper, one of the core components of a mobile communication system, VCO(Voltage Controlled Oscillator) IC is designed. The VCO IC was designed, have realized as LC turned oscillator using varicap. LC sinusoidal tuned oscillator generally requires external inductors and thus remainding circuit is implemneted in monolithic IC. The circuit is fabricated using an 15 mask IC process and has a die size of 1150um${\times}$780um. The tests showed that VCO was operated at frequencies in the regions between 880MHz-915MHz in the control voltage range of 1V to 3V at 5V supply voltage and as the power supply was varied from 4.5V to 5.5V, the frequency varied 425KHz/V. The VCO IC has frequency shift of 1.97MHz/T, carrier level of -7dBm and power consumption of 16.7mA. Also it has phase noise of -80dBc/Hz, offset at 50KHz and harmonic response of center frequency is -41dBm. For the future development of the transceiver 1 chip, the previously mentioned external devices need to be incorporated into Si MMIC.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.5
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• pp.69-76
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• 2004

In this paper, a VCDRO (Voltage Control Dielectric Resonator Oscillator) with low phase noise for X-band application has been designed and fabricated. A low noise and low flicker noise MESFET and a high Q dielectric resonator were selected to obtain good phase noise Performance. Also, a varactor diode having high Q, qualify factor was used to reduce the loading effects and a big Gamma of diode was chosen for linearity of frequency over voltage tuning range. The fabricated circuits was simulated with circuit design tools, ADS to provide the optimum performances. As the measured results of fabricated oscillator, the output power was 5.8 ㏈m at center frequency 12.05㎓ and harmonic suppression -30㏈c, phase noise -114 ㏈c at 100 KHz offset frequency, respectively, and the frequency tuning range as the function of valtage applied to varactor diode was 15.2 MHz and its power variation with frequency was 0.2 ㏈. This oscillator could be available to a local oscillator in X-band.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.103-106
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• 2005

This paper reports design and fabrication of CMOS temperature sensor circuit using MOSIS 0.25um CMOS technology. The proposed circuit has a temperature coefficient of $13mV/^{\circ}C$ for a wide operating temperature range with a good linearity. This circuit may be applicable to the design of one-chip IC where quartz crystal resonator is directly mounted on CMOS oscillator chips.