Low-temperature CVD PN-InP MISFETs

저온 CVD PN-InP MISFETs

  • Jeong, Yoon-Ha (Pohang Institute of Science & Technology Department of Electrical & Electronic Engineering)
  • 정윤하 (포항공과대학 전기전자공학과)
  • Published : 1987.07.03

Abstract

Low temperature phosphorus-nitride CVD was newly developed for a high quality gate insulator on InP substrate. This film showed the Poole-Frenkel type conduction in high electric field with resistivity higher than $1{\times}10^{14}$ ohm-cm near the electric field of $1{\times}10^7\;volt/cm$. The C-V hysteresis width was very small as 0.17 volt. The density of interface trap states was $2{\times}10^{11}cm^{-2}ev^{-1}$ below the conduction band edge of InP substrate. Effective electron mobility was about $1200-1500\;cm^2/Vsec$ and showed the instability of PN-InP MISFETs drain current reduced less than 10 percent for the period $0.5-10^3sec$.

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