근전도 신호 처리를 위한 적응 필터의 VHDL 구현

Implementation of the adaptive filter for EMG signal processing using VHDL

  • 김정섭 (연세대학교 전기공학과) ;
  • 이석필 (연세대학교 전기공학과) ;
  • 박상회 (연세대학교 전기공학과)
  • 발행 : 1996.11.16

초록

We present the implementation of the adaptive filter for EMG signal processing using VHDL. For making ASIC, the basic FPU(floating point processor), e.g., adder, multiplier and divider, are implemented with VHDL. The FPU is simulated and the controller for the RLSL(recursive least square lattice) algorithm of the adaptive filter is implemented. Then FPU and the controller are linked and simulated. Finally the models are synthesized and the gate level is implemented.

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