대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 1998년도 추계종합학술대회 논문집
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- Pages.767-770
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- 1998
RAPTOR의 명령어 페치 유닛 설계
Design of an Instruction Fetch Unit for RAPTOR, a On-Chip Multiprocessor
초록
This paper introduces an instruction fetch unit which is designed for RAPTOR, an on-chip multiprocessor. In order to reduce control hazards, the proposed fetch unit supports a hybrid branch prediction scheme which consists of a static scheme and the 2bC branch prediction scheme. The fetch unit also utilizes the branch folding technique with two instruction buffers to avoid the branch penalty caused by imspredictions. Instructions are predecoded in the fetch unit to achieve extra performance gain.
키워드