32비트 DSP RISC 프로세서를 위한 ALU 설계 및 테스트

ALU Design & Test for 32-bit DSP RISC Processors

  • 최대봉 (연세대학교 전자공학과 VLSI & CAD 연구실) ;
  • 문병인 (연세대학교 전자공학과 VLSI & CAD 연구실)
  • 발행 : 1998.10.01

초록

We designed an ALU(Airthmetic Logic Unit) with BIST(Built-In Self Test), which is suitable for 32-bit DSP RISC processors. We minimized the area of this ALU by allowing different operations to share several hardware blocks. Moreover, we applied DFT(Design for Testability) to ALU and offered Bist(Built-In Self-Test) function. BIST is composed of pattern generation and response analysis. We used the reseeding method and testability design for the high fault coverage. These techniques reduce the test length. Chip's reliability is improved by testing and the cost of testing system can be reduced.

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