32비트 RISC/DSP CPU를 위한 고속 3포트 레지스터 파일의 설계

High Speed Triple-port Register File for 32-bit RISC/DSP Processors

  • 고재명 (연세대학교 전자공학과) ;
  • 유동렬 (연세대학교 전자공학과)
  • 발행 : 1998.10.01

초록

This paper describes a 72-word by 32-bit 2-read/1-write multi-port register file, which is suitable for 32-bit RISC/DSP microprocessors. To minimize area and achieve high speed, advanced single-ended sense amplifiers are used. Each part of circuit is optimized at transistor level. The verification of functionality and timing is performed using HSPICE simulations. After modeling and validating the circuit at transistor level, it was laid out in a 0.6um 1-poly 3-metal layer CMOS technology. The simulation results show maximum operating frequency is 179MHz in worst case conditions. It contains 27,326 transistors and the size is 3.02mm by 2.20mm.

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