A Study on the Influence of the Dead Time Minimization Algorithm on the Low Output Voltages

저 전압 출력 영역에서 휴지기간 최소화 알고리즘의 영향 고찰

  • Choi, Jung-Soo (School of Electrical & Computer Engineering, Inha University) ;
  • Kim, Jin-Soo (School of Electrical & Computer Engineering, Inha University) ;
  • Kim, Young-Seok (School of Electrical & Computer Engineering, Inha University)
  • 최정수 (인하대학교 전자.전기.컴퓨터공학부) ;
  • 김진수 (인하대학교 전자.전기.컴퓨터공학부) ;
  • 김영석 (인하대학교 전자.전기.컴퓨터공학부)
  • Published : 1999.07.19

Abstract

The dead time deteriorates the output performance of the PWM inverter so that various compensation schemes have been proposed. If the modulation index is rendered with the low output frequencies, those schemes do not work well because of the zero clamping phenomena. In this paper, we investigate the influence of the dead time minimization algorithm on the low output voltage reference. The validity of the algorithm is examined by comparing the simulation results with those of conventional methods.

Keywords