ADSL용 DMT 시스템에 적합한 Variable step-size LMS equalizer의 ASIC 설계

ASIC design of variable step-size LMS equalizer adapted DMT system for ADSL

  • 하석기 (순천대학교 전자공학과) ;
  • 박솔 (순천대학교 전자공학과) ;
  • 김태훈 (순천대학교 전자공학과) ;
  • 송재철 (인덕대학 정보통신과) ;
  • 조병록 (순천대학교 전자공학과)
  • Ha, Suk-Ki (Department of Electronics Engineering, Sunchon National University) ;
  • Park, Sol (Department of Electronics Engineering, Sunchon National University) ;
  • Kim, Tae-Huun (Department of Electronics Engineering, Sunchon National University) ;
  • Song, Jai-Chul (Department of Information & Communication, Induk Institute of Technology) ;
  • Cho, Byung-Lok (Department of Electronics Engineering, Sunchon National University)
  • 발행 : 1999.06.01

초록

In this thesis, the structure of equalizer adapted to DMT system for ADSL, its performance analysis is accomplished with computer simulation, and ASIC design. There are several methods in equalization, among them by using Variable Step-Size LMS algorithm to be concerned with convergence efficiency with training sequence, and its ASIC design.

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