In this paper, we suggest a way of implementing ISDN S-Interface through two-wire premises telephone networks instead of using four wires as in the existing ISDN systems. This will help many developing or underdeveloped countries in the world to introduce ISDN services, where they have only two or low wires as in-building telephone networks. We suggest new physical-layer specifications for two-wire S-interface similar to that in ITU-T recommendations I.430 for four-wire systems, design a tranceiver according to the suggested specifications, and implement it using an FPGA We build a test board with the chip on it and succeed in connecting to Internet.

The 6Bone is an environment supporting experimentation with the IPv6 protocols and products implementing it. Several functions of IPv6 remain loosely defined or undefined but the protocols related on IPv6 are being developed continuously. It is clear that ATM(Asynchronous Transfer Mode) technology is playing a important role in the evolution of the Internet as a transmission medium. In this paper, we suggest a design plan for the 6Bone overlayed on the existing ATM network, KOREN(Korea Research and Education Network). The planed 6Bone will become a good testbed to develop new networking technology and new services related on IPv6.

The terrestrial/satellite hybrid network may replace or supply the terrestrial network in some areas or certain application. Futhermore, it can play an important role in the development of B-ISDN due to their features of flexible wide coverage, independent of ground distances and geographical constraints, multiple access and multipoint broadcast. Also, satellite have the capability to supply terrestrial ATM and B-ISDN with flexible links for access networks as well as trunk networks. This paper describes the design and verification of the interworking protocol between terrestrial B-ISDN and satellite network. For the verification, the designed interworking protocol is modeled by Petri-net and analyzed by reachability tree.

In these days, wavelength division multiplexing(WDM) all-optical network are being deployed to support various multimedia communication services. In this paper, various WDM all-optical network are discussed, and a design of an all-optical backbone network has been proposed by using multiple self-healing ring technology. The proposed multiple self-healing ring network improves network expandability and efficiency of bandwidth, while it retains simplicity and ease of network control, which are from the nature self-healing ring. Using PDI traffic modeling technique, a well-balanced all-optical backbone network using multiple self-healing ring is designed for the 2010s in Korea.

멀티미디어 시대로의 진입에 따른 인터넷에서의 실시간 데이터 전송을 위한 어플리케이션의 요구에도 불구하고 현재의 인터넷은 최선형 서비스만을 제공할 뿐 QoS(quality of service)를 제공하지 못하고 있다. 이에 인터넷 표준화 기구에서는 종합서비스(IS : integrate service)모델을 정했다. 〔5〕 그러나 기존의 shared LAN 환경에 이를 적용하기에는 자원의 공유로 인한 어려움이 있다. 반면. 직렬 버스의 표준으로 자리잡은 IEEE 1394 고속 직렬 버스〔1〕〔2〕는 예약된 대역폭을 보장할 수 있을 뿐만 아니라 고속통신이 가능하여 IS 모델의 적용에 적합한 기술이라고 할 수 있다. IS over 1394 프로토콜〔8〕은 IS 모델을 IEEE 1394 고속 직렬 버스에 적용하기 위한 프로토콜로써 본 논문에서는 이의 구현을 위한 구조를 고찰하였다.

Consider connection-oriented wireless cellular net-works. To establish a circuit or virtual circuit in such a network, a paging message is broadcast over a region at which the destined mobile station is presumed to reside, (identified as a paging area). For an effective paging mechanism, it is desirable to provide the location information of mobile stations to the network. In this paper, we consider a mobile controlled location update scheme under which each mobile station periodically reports its current location information to the network by using an inherent timer (without measuring the power of signals transmitted from base stations). Based on the latest information about a mobile station's location, a paging area is selected to page the mobile station. Note that under this scheme, a mobile station may not yet have reported its location change while sojourning out of the current paging area. In such situation, the mobile station can not receive a paging message destined to it. Frequent location updates can reduce the paging failure rate incurred by mobile stations'sojourning out of the paging area. However, larger bandwidth is needed for location update as the location update rate is increased. On the other hand, as the size of the paging area is increased, the paging failure rate is decreased, while larger bandwidth is required for paging. Thus, we first present a model for mobility, paging and location update processes, and secondly investigate the effect of network parameters on the paging failure rate and the amount of bandwidth used for paging and location update. Finally, we formulate problems to find proper values for the location update rate and paging area size under the constraints on the bandwidth usage levels for location update and paging.

In this study, the time delay model were simulated using the well-known AR model. Frequency response of the time delay model can be obtained by mapping AR model to JTC model in the time domain. That is, from the few measurement data in JTC model, the channel frequency response can be obtained by the estimation of AR model parameters. From this channel frequency response, the time delay model can be obtained using Fourier transformation. To prove the validity of the suggested method, three models of JTC were shown and analyzed.

This paper proposes a mathematical model for the statistics of the W-CDMA signals with different bandwidth. Based on the statistics of numerically generated signals, a mathematical model is obtained such as Rayleigh, Rician, and Maxwell distribution. We employ Chi-square test to verify the fitness of the mathematical model with signal statistics. The results show obviously that the new proposed model is useful for representing W-CDMA signals.

In this paper, we analyzed transmission capability of VDSL system under the various noise in VDSL transmission lines. For this, we calculated transmission capacity using loading algorithm with transmission channel which suggested by ANSI DSL standard group TIE1.4. As a result, we've got approximated outcome similiar with target capacity in VDSL systems in short range. But we couldn't have got a outcome with target capacity in long range.

In this paper we proposed the algorithm for the implementation of network interface unit transmitter and analyzed its performance in broadband wireless local loop. The symbol rate of upstream transmitter is variable since the channel bandwidth of upstream can vary. Assuming that master clock ( $f_{DAC}$) is fixed, the cubic interpolator of Farrow structure is used to increase the sample rate to master clock rate. Simulation shows that the signal to noise ratio is about 54~55 dB and spurious signal power of upstream transmitter is less than 45 dB.B.

The demands of WLAN(Wireless Local Area Network) systems increase rapidly in whole society and this phenonenon has been expected that WLAN wi11 substitute for wired-LAN. The FHSS(Frequency Hopped Spread Spectrum) method using the WLAN is changed to the performance of Frequency synthesizer. In this paper, we proposed pipeline-accumulator using ring-counter method instead of constant accumulator that has demerits of size and power consumption. Designed DDFS generated operating frequency of 167MHz and maximum output frequency of 83.5MHz.

In this paper, we describe the structure of the DWMT (discrete wavelet multitone) transceiver for VDSL system. The DWMT transceiver is basically consisted of the transmultiplexer using cosine modulation filter bank (CMFB), time domain equalizer (TEQ) and frequency domain equalizer (FEQ) minimizing the effects of the transmission channel. For FEQ, we expanded the general LMS algorithm to 2-dimensions: time and subchannel axes and examined the 2-dimensional LMS methods with the various array size.

In this thesis, the structure of equalizer adapted to DMT system for ADSL, its performance analysis is accomplished with computer simulation, and ASIC design. There are several methods in equalization, among them by using Variable Step-Size LMS algorithm to be concerned with convergence efficiency with training sequence, and its ASIC design.

In many radio communication environments, there is a special component, called inter-symbol interference (ISI), mused by multipath time delay of signal and ISI components impose limitation of the data transmission rate. In this paper, we consider signaling pulse shapes, called partial response signaling (PRS), for minimizing the effect of ISI and show the improvement of performance by applying one of the partial-response signaling (PRS) pulses to two types of receiver system under dependent noise environments through the Monte-Carlo computer simulations.

The turbo code appropriate to IMT-2000 is known to have a good performance whenever the size of frame increases. But it is not appropriate to a sort of video service to need real time because of decoding complexity and long delay time by the size of frame. Therefore this paper proposes decoding decision algorithm of short frame in which soft output is weighted according to iteration number in turbo decoder. Performance of the proposed algorithm is analysed in the AWGN channel when short length of frame is 100, 256, 640. As the result. it is appeared that the proposed decoding decision algorithm has improved in BER other than in the existing MAP decoding algorithm.

In this paper the Wideband DS/CDMA system capacity variation is analyzed by the impact of imperfect sectorization and man-made noise, which is more predominant in urban area than thermal noise. In general man-made noise is increasing as the electronic machines are increasing nowadays. It shows that user capacity and cell radius variation are much sensitive by the man-made noise.

In this paper, an efficient time domain equalization algorithm for discrete wavelet multitone(DWMT) data transmission is developed. In this algorithm, the time domain equalizer(TEQ) consists of two stages, i.e., the channel impulse response shortening equalizer(TEQ-S) in the first stage and the channel frequency flattening equalizer(TEQ-F) in the second stage. TEQ-S reduces the length of transmission channel impulse response to decrease intersymbol interference(ISI) followed by TEQ-F that enhances the channel frequency response characteristics to the level of an ideal channel, hence diminishes the bit error rate. TEQ-S is implemented using the least-squares(LS) method, while TEQ-F is designed by using the least mean-square(LMS) algorithm. Since DWMT system also requires of the frequency domain equalizer in order to further reduce ICI and ISI the hardware complexity is an another concern. However, by adopting an well designed and trained TEQ, the hardware complexity of the whole DWMT system can be greatly reduced.

In this paper, we propose a new design of turbo decoder. It contains the simple additional unit which automatically decides the number of the iteration by detecting of the reliability value as threshold value. We investigate the relationship between the reliability value and the number of the iteration. We find the optimal threshold value without noticeable loss in performance. As a results of the simulation, it reduces the average number of the iteration compared with the conventional turbo decoder.

This paper deals with a design of a symbol timing recovery circuit of QAM using the interpolation in AWGN channel. To reduce timing jitter and the amount of processing data, we employ MGA (Modified Gardner Algorithm) as a symbol timing error detector which is called NDA(Nondecision Directed Algorithm). We show the characteristics (S-curve and the variance) of timing error detector with the roll-off factor of a shaping filter, which are compared with GA. Also, we compare the BER curve of interpolation method with that of ideal case. The performance of the STR is shown to be close to that of ideal case. This result shows that this method can be useful to implement symbol timing recovery circuit for multi-level modulation.

DWMT VDSL system needs A/D converter clock, bit clock, symbol clock, frame clock, etc. DMT ADSL system utilizes a correlation method which makes use of cyclic prefix or preamble pattern for clock recovery. But the correlation method is difficult to apply to the DWMT system because modulated symbols are overlapped in the time domain. This paper proposes a novel clock recovery method which can be used for the DWMT system due to its inherent independence of the modulation method. This new method is verified by SPICE simulations.

In this paper, we propose a new architecture of the fast symbol timing synchronization system which has some shared hardware blocks in order to reduce the hardware complexity. The proposed system consists of received power detector, correlation power detector using shared complex moving adders, and 2-step peak detector. Our system has detected FFT starting point within three Symbols using first two reference symbols of the frame in wireless ATM system. The new architecture was designed and simulated using VHDL. Our proposed architecture also detects a correct symbol timing synchronization within three symbols under a multi-path fading channel.

본 논문에서는 캐리어의 동기가 맞았다는 가정 하에서 초기동기 직렬탐색 방식중의 하나인 Multiple Dwell 방식을 사용하여 각각의 초기동기 평균 획득시간과 분산 값을 비교하였다. 문턱값의 설정은 Maximum Likelihood 방식을 도입하여 MATLAB으로 이론값을 계산하고, 이를 SPW라는 시뮬레이션 툴로 모델링을 하여 시뮬레이션 값과 이론값을 비교 분석하였다. 신호 대 잡음비에 대한 Multiple Dwell 방식의 성능을 비교 분석한 결과. Dwell의 수가 증가할수록 성능은 개선되지만 Dwell의 수가 2일 때가 성능 개선 폭이 가장 컸고 Dwell의 수가 4이상에서는 개선 폭이 아주 작아짐 을 보였다.

In this paper, a new real-time neural network connection admission controller is proposed. The proposed controller measures traffic flows, cell loss rate and cell delay periodically each classes. The Neural network learns the relation between those measured information and service quality by real-time. Also the proposed controller uses the DWRR multiplexer with buffer dedicated to every traffic source in order to measure the delay that cells experience in buffer. Experimental result shows that the proposed method can control effectively heterogeneous traffic sources with diverse QoS requirement.

Proposed in this paper is an algorithm in which the maximum value of transmission delay due to collision during the reservation request minicell transmission in the uplink period is guaranteed for each traffic type in order to support real time multimedia traffic in wireless ATM environment. Also proposed is a scheme that uses minislots in which dynamic parameters can be transmitted without collision by using only 1-bit piggyback flag of each cell. Setting the piggyback flag is determined according to traffic characteristics and buffer length of each mobile terminal. It is shown that there has been a great improvement in performance of the proposed algorithm through performance analysis using simulation although the algorithm has little overhead.

AAL type 2 provides for the bandwidth efficient transmission of low bit rate, short and variable packets in delay sensitive application. The service object for these networks ranges from POTS to multimedia conference. In this paper, we present one possible architecture which common part sublayer for new AAL type 2. The proposed CPS function has been achieved with on a FPGA The proposed architecture is faithful to the standardization of ITU-T and ATM-forum recommendation The proposed architecture applies to variable packet length from architecture CODECs for cellular network.. It's maximum process capability is 155Mbps with 256 CIDs. The architecture has sync./async. interface to application block and UTOPIA interface is used for physical layer interface.

위성 인터넷망에서의 성능 향상을 위한 프록시의 대표적인 기법인 Snoop과 Spoofing에서의 TCP 성능을 모의실험을 통해 비교하고, 전체 메모리 크기에 따른 TCP 전송 특성 변화를 살펴보았다. Spoofing과 Snoop에서 모두 TCP 전송율이 향상됨을 확인할 수 있었고, Spoofing을 적용했을 경우 Snoop보다 높은 전송율을 얻을 수 있었으나 데이터를 저장하기 위한 버퍼 요구량이 매우 커졌다. 메모리 크기는 제한되어 있으므로 효율적인 메모리 분배 방법이 필요함을 고찰할 수 있었다.

In this paper. we propose an adaptive handover scheme in wireless network The proposed handover scheme is a hybrid type of virtual path extension and rerouting. The proposed handover scheme chooses the virtual path management scheme according to the service QoS instead of the network topology which is used in the previous hybrid handover schemes. The proposed scheme supports the seamless service and small buffering during virtual path rerouting handover through the multicasting service. To evaluate the performance of the proposed scheme. we compute the number of signaling message used for handover and perform computer simulation. The simulation results show that the proposed scheme provides more efficiency in the handover delay and seamless service than the previous methods.

Hluchyj and Karlo proposed to simple algorithm for input buffer queue service in packet switch. This paper using not multiple queue but single queue shows, in first, the improved processing rate. Next shows a few fairness as accessing, Finally shows more improved than the existed method.

Multicast addresses cannot be permanently assigned to particular application or group combination, but need to be available for re-use. So, this requires a dynamic multicast address allocation and release mechanism. For a dynamic multicast address allocation and release mechanism, we must consider low blocking probability, low delay, low control traffic overhead. In this paper, we suggest a efficient dynamic multicast address allocation and release mechanism based on the multicast scope

In this paper, we propose a new architecture of the Banyan switch for a high speed networking and the high speed parallel computer. The proposed switching network with a remodeled architecture is a newly modified Banyan network with eight input and output pots, respectively. We have analysed the maximum throughput of the revised switch. Our analyses has shown that under the uniform random traffic load, the FIFO discipline is limited to 70％. Therefore the result of the analyses shows that the results of the networking simulation with the new switch are feasible and if we adopt such as new architecture of the revised model of the Banyan switch, the hardware complexity can be reduced. The FIFO discipline has increased about 11% when we compare the switching system with the input buffer system. We have designed and verified the new switching system in VHDL.

In this paper, it is assumed that a mobile radio channel is a Rayleigh distributed multipath fading channel and Erlang capacity and equivalent channel numbers are calculated for the reverse link of a imperfect power controlled DS/CDMA cellular system considering both shadowing and multipath fading. The DS/CDMA blocking probability is calculated based on a new analysis method that considers Erlang capacity and ICF(interference correction factor) using the median value of $E_{b(i)}$/ $I_{o}$ corresponding to each reverse link user. It is showed that the effect of multipath fading must not be ignored in Erlang capacity of the IS-95 DS/CDMA cellular system and the Erlang capacity is decreased according to the increase of the deviation of the imperfect power control, to the decrease of the processing gain, to the increase of the voice activity.y.

In the view point of further reducing the inter-symbol interferences studied in our previous paper 〔1〕, a quadrature pair of wavelet-based filter banks that are composed of a pair of cosine and sine modulated filter banks is applied to MC-CDMA transmultiplexing. For that fact, the symbol duration gets twice longer than the one in , 〔1〕, the interference effects due to channel overlapping and Doppler spread can be effectively alleviated while increasing the channel utilization efficiency. Moreover, the well-known wavelet properties are exploited to design the prototype filter in such a way to maintain the size of sidelobes much smaller than those of the FFT, the interference reduction effect can be further obtained. To verify the behavior of our proposed quadrature filter bank based MC-CDMA system, the reverse-link bit error rates with respect to SNR under Rayleigh fading and additive white Gaussian noise channel environments are computed. The results show an improved system performance over the conventional MC-CDMA.

The MC-CDMA(Multi-Code CDMA) systems for handling various data transmission rate which is demanded in the IMT-2000 systems are effective transmission technology, which can provide the higher data service than the conventional IS-95 CDMA systems because a user takes advantage of a number of channels. The receiver of MC-CDMA systems to be provided these data service have to be structured of demodulating simultaneously a number of traffic channels. This paper is designed the merged rake receiver demodulating simultaneously a number of traffic channels in the MC-CDMA systems. The merged rake receiver is to reduce the complexity of receiver resulting a number of channels.

New solutions are given for the capacity and spectrum efficiency of frequency hopped spread spectrum multiple access system(FH-SSMA) in a Nakagami interference environment. In this paper we derive a exact formulation of the deletion probability for a mobile environment and analyze the system capacity and spectrum efficiency in terms of the average bit error rate(BER). It is shown that the system capacity is decreased by 52% as the Nakagami fading parameter is reduced to 0.5 and the required signal to noise ratio(SNR) is above 25dB, to get the spectrum efficiency of 0.3.

The ability to rapidly create and deploy new and novel services in response to market demands will be the key factor in determining the success of the future service provider. This goal may be approached from different directions. One of them is an open interface making the functionalities of a network element programmable and usable by outside entities. In this paper, we describe several aspects of this new, hot technical area and introduce related standard activities. In addition, we present a new switching system called MSMP (Multi-Service Multi-Plug-In), which is based on the open programmable interface concept, and describe its architecture and main functionalities of its components.

As VLSI technology advances rapidly, the operating frequency of digital systems becomes very fast. In such a high-speed system, there are many factors that threaten signal integrity. The noise sources in digital system include the noises in power supply, ground bounce and packaging media and distortions on single and multiple transmission lines. This paper will present a technology survey useful in the design of Gigabit interconnection systems. Some case studies have been constructed which show the lossy transmission line effect of skin effect. dielectric loss, with backplane connectors using the theoretical and practical conditions.

Photonic Slot Routing(PSR) is a promising approach to solve the fundamental scalability problem of all-optical packet switched WDM networks. In photonic slot routing, packets destined for the same subnetwork are aggregated to form a photonic slot which is jointly routed as a single unit of information through the network. The relative location of the nodes from bridge may cause to fairness problem in the unidirectional WDM ring network based on PSR. As photonic slots from different subnetworks can originate contentions at the bridge, packets may be dropped and retransmitted. Thus we evaluated the performance of PSR based WDM ring network in the point of fairness for each node and slot contentions at the bridge. Simulation results show that the PSR based WDM ring requires a slot access mechanism to guarantee the transmission fairness and efficient switch architecture to resolve slot contention at the bridge.

This Paper proposes the architecture of WDM(wavelength division multiplexed) based large scale photonic packet switch network, which is composed of the FC(frequency converter) and OM (output module). The features of the proposed WDM based photonic packet switch network are 2-stage switch network, and WDM based internal optical link that is connected between FC and OM. This paper evaluates the internal call blocking characteristics of the photonic packet switch network. In results, we confirmed that the proposed WDM based photonic packet switch network has the potentiality in the practical implementation.

ATM technology is well developed. Small-scale access node and edge switches are introduced in the network. Large scale ATM core switches are prepared for backbone application. Currently, Internet traffic is increasing so rapidly and we need to consider effective way of accommodating the volume of traffic. In the other hand, QoS and traffic engineering concept is required in the Internet services. Here, in this paper, two technologies are explained and suggested for integration of networks for future ATM based IP network.

A fault-tolerant system should have a high availability and high reliability to maintain a given system stable against sudden faults in the system. In this paper, we propose a new types of fault tolerant system based on a fault detection bus. The fault detection bus is designed and implemented to detect any errors by comparing event-output signals from two processor modules. It employs the hot standby sparing fault detection method〔1〕 to provide continuity of services even if a system fault occurs. The prototype fault tolerant system is currently being implemented on a management system with two processor modules.

In this paper, we propose new algorithm to minimize the total cost of overall system in WDM ring networks. The cost of system includes the number of SONET ADMs as well as the number of wavelength. As optical technologies and WDM components are developed, the dominant cost of system is the number of SONET ADMs which is electronic equipment. To reduce the number of SONET ADMs in nonuniform traffic, we propose two algorithms one is the algorithm to construct full circles as many as possible to minimize gaps by cutting and combining the connections. The other is the algorithm to groom circles Into a wavelength to share the maximum number of nodes. The simulation results show that the proposed algorithm is superior to conventional algorithm in nonuniform traffic

전력 증폭기의 3차나 5차 비선형성은 인접 통신 채널에 직접적인 영향을 미치므로 선형화 기법을 이용하여 출력단의 혼변조 신호를 감쇄시켜야 한다. 본 논문에서는 전력 증폭기의 입력 신호를 기저대역에서 왜곡시켜 전력 증폭기를 선형화 시키는 디지털 사전 왜곡기를 구현하였다. 측정에 앞서, 모의실험을 통하여 시스템 변수에 따른 선형화기의 성능을 예측하고, 1차원 참조표(look-up table)를 사용한 사전 왜곡기의 측정 결과, 약 9 dB의 ACPR 개선 효과를 얻을 수 있었다.

The Ultra-miniature and low phase noise Colpitts VCO of 0.06㏄ in size has been developed using the high Q resonator and phase compensation technique. This type is one transistor VCO without a buffer. To design and simulate the VCO accurately, nolinear model parameters of a bipolar transistor are extracted using the measured I-V data and S parameters based on the Gummel-Poon model. Design and simulation have been done by Serenade 7.5 design tool using the extracted nonlinear model parameters. The wideband VCO has been designed using two varactor diodes and open loop gain compensation technique to improve the operating frequency range. The ultra-miniature VCO has shown the phase noise of -91㏈c/Hz at 10KHz offset and output power of -3㏈m The wideband VCO has shown the tuning frequency bandwidth of 150MHz phase noise of -95㏈c/Hz at 10KHz offset and output power of 5㏈m.

In order to predict the effect of power amplifier non-linearity for digital modulated signal, this paper analyses the adjacent channel power ratio(ACPR) with the various AM-to-PM distortion levels. As the phase distortion increases from 0$^{\circ}$ to 12$^{\circ}$ at 1㏈compression point by 2.4$^{\circ}$ step, the input power level which satisfies the required ACPR decreases from 3.5㏈ to 6.5㏈ less than the 1㏈ compression input power.

The balanced amplifier is a practical amplifier to, implement a broadband amplifier that has flat gain and good input and output VSWR. Three-stage amplifier design procedure usually divided into three partition satisfying the following requirements : low noise figure, high gain and high power output. FHX35LG HEMT device is used in the design can be obtained low noise figure at the first-stage, MGA82563 MMIC device is used in the design can be maintained high gain at the second-stage, and AHI MMIC device is used in the design can be required high power output at the third-stage. The results of three-stage balanced amplifier show that power gain is about 40㏈, noise figure is less than 1.2㏈ at operating frequency.

Complex resonant frequency of on a uniaxial substrate with a superstrate-loaded microstrip structure is investigate. The study is performed by Galerkin’s method. The numerical convergence using sinusoidal basis function. Numerical results for the effects of anisotropy in the substrate, superstrate permittivity, in the complex resonant frequency of the rectangular microstrip structure are also presented. Half-power bandwidth are increased due to the positive uniaxial an isotropy and superstrate.

In this paper, a possibility of building various types of RF passive components using the silicon micromachining technique has been examined with special emphasis on the wireless and mobile communication applications. Silicon micromachining technique is compatible with conventional silicon IC process and could provide a possibility of integrating base-band signal processing units and RF passive and active circuit components all in one silicon wafer rendering implementation of system-on-chip paradigm for future mobile and wireless communication systems.

This paper describe the design and fabrication of a Multilayer helical antenna for PCS cellular phone. It has been designed for commercial PCS cellular phone by HP-HFSS and fabricated with diameter of 7.6mm and height of 9mm. As a result, the antenna was well-operated in the frequency ranges of 1.75~1.87㎓ for the application of PCS system. We obtained omni-directional radiation pattern, gain of -0.9㏈i and bandwidth of 180MHz.

In this paper, aperture coupled microstrip antenna which has a larger bandwidth was designed using genetic algorithms. The genetic algorithms encodes each parameters which are the width, length of patch and the width, length of slot, into binary sequences, called a gen. Genetic algorithms searches a optimal gen to design a larger bandwidth. Simulation results are compared with Pozar's results.

Periodical surfaces with the sawtooth profile are studied on their backscattering by the TE plane wave incident. The backscattering is calculated by the mode-matching method. The surfaces are perfect conductor and are covered with dielectric materials to make a flat surface. It is observed that a cover filled with multiple dielectric layers can be used to reduce the backscattering at an arbitrary incident angle.

본 논문에서는 직사각형 마이크로스트립 슬롯 안테나에서 폭이 넓은 슬롯에는 적합하지 않은 기존의 급전 구조대 신 T자형 급전 방식과 십자형 급전 방식으로 안테나를 설계하였다. 여기서 제시한 T자형 급전 방식을 이용하여 슬롯 폭이 20㎜일 때 41%의 대역폭 특성을 얻었고. 십자형 급전 방식으로는 슬롯 폭이 32 ㎜일 때 96%의 대역폭을 얻었다. 또한 기존의 원형 링 슬롯 안테나의 구조를 바꾸어 슬롯의 원주(circumference)가 163 ㎜일 때 1.35 octave의 광대역 특성을 얻었고, 원형 슬롯 안테나와 이에 적합한 급전 방식을 제시하여 슬롯의 원주가 같을 때 3.25 octave의 광대역 특성을 얻었다.

A SBR/Image ray-tracing technique using triangular ray tubes to predict the effects of walls. rooms. floors, and staircase is considered. Suggested technique is very efficient to estimate the path loss in three-dimensional buildings including the staircase. The model to predict the path loss through walls and floors in a multifloored building is presented. Measurements are made for three corridors having the staircase at 850 MHz, Measured data shows a close agreement with a simulated data.

We study the propagation property of the transient signals along the microstrip using the wavelet transform. Wavelet transform can offer the time-frequency windows. It makes the resolution of time high in high frequency range and the resolution of frequency high in low frequency range. So It is useful to analyze the signals which have both low and high frequency components.

Rigorous formulation for solving the scattered fields by a lossy dielectric wedge is proposed. By employing the Kirchhoff's integrals in the physical domain and the extinction theorem in the mathematically complementary region, it is shown that the accurate solution is obtained by adding the numerically corrected fields generated by the multipole source expansions to the analytically approximated physical optics solution. Its accuracy is affirmed by the extinction behavior of the solution in the complementary region.

극 미세 기술과 이에 수반되는 고가 장비와 시설에 대한 대량 투자, 그리고 고속, 저전력, 멀티미디어로 대변되는 칩의 다기능화라는 반도체 기술의 기술적 측면과 산업적 측면을 조망한다. 이러한 환경 내에서 산업화 이전 핵심기술을 산·학·연이 공동 개발함으로써, 연구개발 위험도를 줄이고 국가적으로 핵심기술을 위한 인프라를 구축하고자 1998년부터 시작된 시스템집적반도체기반 기술개발사업 (System IC 2010 : A Collaborative Project for Excellence in Basic System IC Technology)의 내용과 방향을 제시하고자 한다.

In this paper, we report the process/device design of high-speed, high-voltage SOI smart power IC for mobile communication system, high-speed HDD system and the electronic control system of automobiles. The high voltage LDMOS with 70V breakdown voltage under 0.8${\mu}{\textrm}{m}$ design rule, the high voltage bipolar with 40V breakdown voltage for analog signal processing, the high speed bipolar with cut-off frequency over 20㎓ and LDD NMOS for high density were proposed and simulated on a single chip by the simulator DIOS and DESSIS. And we extracted the process/device parameters of the simulated devices.

We studied the MOSFET characteristics and the hot-carrier reliability with the sidewall spacer composition and the post gate oxidation thickness in 0.20${\mu}{\textrm}{m}$ gate length transistor. The MOSFET with NO(Nitride＋Oxide) sidewall spacer exhibits the large degradation of hot-carrier lifetime because there is no buffering oxide against nitride stress. When the post gate oxidation is skipped, the hot-carrier lifetime is improved, but GIDL (Gate Induced Drain Leakage) current is also increased.

This paper presents characteristics of neuron-MOSFET for the implementation of logic circuits such at the inverter and D/A converter. Neuron-MOSFETS were fabricated using double poly CMOS process. From the measured results, it was found that noise margin of the inverter was dependant on the coupling ratio and a complete D/A characteristics of the source follower could be obtained by using any input Sate as a control gate.

RF CMOS 집적회로 기술은 CMOS 기술의 급격한 발전과 더불어 최근 크게 주목 받고 있다. 이는 CMOS가 제공 할 수 대량생산 능력으로 인해 기존 RF IC의 저가격화뿐 아니라 미래의 복합.다기능 무선 멀티미디어 단말기 구현을 위란 single chip solution을 제공 할 수 있는 가능성이 가장 높기 때문이다. 본 논문은 먼저 개인 휴대 통신 단말기 시장을 전망해보고, 향후 전개될 다양한 무선서비스에 대응하기 위한 RF CMOS 집적회로의 소자 및 설계 기술개발 현황과 향후의 발전 전망을 기술한다.

We have designed a 32-bit RISC microprocessor with 16/32-bit fixed-point DSP functionality. This processor, called YRD-5, combines both general-purpose microprocessor and digital signal processor (DSP) functionality using the reduced instruction set computer (RISC) design principles. It has functional units for arithmetic operation, digital signal processing (DSP) and memory access. They operate in parallel in order to remove stall cycles after DSP and load/store instructions with one or more issue latency cycles. High performance was achieved with these parallel functional units while adopting a sophisticated 5-stage pipeline structure and an improved DSP unit.

This paper presents a circuit-level method to deal with transistor nonuniformity In this method, which is called transistor slicing, a transistor is implemented as a parallel connection of multiple smaller transistors. The paper analyzes the method and demonstrates that transistor slicing can effectively reduce the nonuniformity in TFT mobility and threshold voltage. The method is particularly useful in Implementing analog functions using poly-silicon TFTs which show a significant level of nonuniformity.

In this paper, a wideband MMIC distributed amplifier was designed using the fabricated PHEMT with the unit gate width of 80 ${\mu}{\textrm}{m}$ and 4 gate fingers at our Lab. S$_{21}$ gains are 7.1 ~ 10.0 ㏈. Input and output reflection coefficients obtained from the distributed amplifier in the frequency range of DC~25 ㎓ are lower then -8 ㏈. A chip size of the designed wideband MMIC distributed amplifier is 1.9 mm $\times$ 1.1 mm.

As the semiconductor industry enters the next century, we are facing to the technological changes and challenges. Optical lithography has driven by the miniaturisation of semiconductor devices and has been accompanied by an increase in wafer productivity and performance through the reduction of the IC image geometries. In the last decade, DRAM(Dynamic Random Access Memories) have been quadrupoling in level of integration every two years. Korean chip makers have been produced the memory devices, mainly DRAM, which are the driving force of IC＇s(Integrated Circuits) development and are the technology indicator for advanced manufacturing. Therefore, Korean chip makers have an important position to predict and lead the patterning technology. In this paper, we will be discussed the limitations of the optical lithography, such as KrF and ArF. And, post optical lithography technology, such as E-beam lithography, EUV and E-beam Projection Lithography shall be introduced.

We have grown vertically aligned carbon nanotubes in a large area of Co-Ni codeposited Si substrates by the thermal CVD using $C_2$H$_2$gas. Since the discovery of carbon nanotubes, Synthesis of carbon nanotubes for mass production has been achieved by several methods such as laser vaporization, arc discharge, and pyrolysis. In particular, growth of vertically aligned nanotubes is of technological importance for applications to FED. Recently, vertically aligned carbon nanotubes have been grown on glass by PECVD. Aligned carbon nanotubes can be also grown on mesoporous silica and Fe patterned porous silicon using CVD. Despite such breakthroughs in the growth, the growth mechanism of the alignment are still far from being clearly understood. Furthermore, FED has not been clearly demonstrated yet at a practical level. Here, we demonstrate that carbon nanotubes can be vertically aligned on catalyzed Si substrate when the domain density reaches a certain value. We suggest that steric hindrance between nanotubes at an initial stage of the growth forces nanotubes to align vertically and then nanotubes are further grown by the cap growth mechanism.

Acceleration in integration density and speed performance of ULSI circuits require miniaturization of CMOS and interconnections as well as higher current density capabilities for transistors. A leading candidate to substitute A1-alloy is Cu, which has lower resistivity and higher melting point. So we can expect much higher electromigration resistance. In this paper, we are going to explain the major features of EM for MOCVD Cu according to variant conditions. We compared the life time and activation energy of MOCVD Cu with those of E-beam Cu and Al in The same conditions.

Transparent conductive aluminum-doped ZnO(AZO) films Were prepared by a ultrasonic spray pyrolysis method at the substrate temperature below 23$0^{\circ}C$. A vertical type hot wall furnace was used as a reactor in the deposition system. Zinc acetate dissolved in methanol was selected as a precursor. The substrate temperature was varied from 18$0^{\circ}C$to 24$0^{\circ}C$. Aluminum (Al) was doped into ZnO films by incorporating anhydrous aluminum chloride (AlCl$_3$) in the zinc acetate solution. The proportion of the Al in the starting solution was varied from 0 wt % to 3.0 wt %. The crystallographic properties and surface morphologies of the films were analyzed by X-ray diffraction (XRD) and scanning electron microscopy (SEM), respectively. The resistivity of the films was measured by the Van der Pauw method, and the mobility and carrier concentration were obtained through the Hall effect measurements Transmittance was measured in the visible region. The effects of substrate temperature and aluminum content in the starling solution on the structural and electrical properties of the AZO films are discussed

Random reference wave can be used to enhance selectivity and storage density of holograms. Hologram recording schemes with random reference waves generated by using a ground glass or various types of optical fibers are discussed. The random reference waves are also suitable for hybrid multiplexing methods.

본 논문에서는 위상 다중화 홀로그래픽 메모리 시스템에서 사용될 최적의 위상코드를 구현하기 위해 기존에 위상 다중화에 많이 사용되고 있는 Hadamard 행렬을 비롯한 여러 행태의 랜덤 위상코드들의 상호상관 값에 의한 Cross talk의 영향 및 신호대 잡음비, 그리고 어드레스 갯수를 비교 분석하였다.

중요한 정보 암호화하여 복수 회원에게 분산시킨 후 회원의 합의에 의하여 해독이 가능하게 하는 thresholding scheme은 visual cryptography에 의하여 시각적인 표현이 가능하게 되었다. 그러나 visual cryptography는 표현의 한계로 응용범위가 극히 제한되었다. 이 논문에서는 visual cryptography의 응용범위를 수학에서 광학으로 확장하기 위하여 binary computer generated hologram을 encryption하는 방법을 제시하고 security 특성을 분석한다.

In this paper, we proposed the new method of extracting the position and the length of the input-line by using only two parameters ($\theta$, $\rho$) from the HT(Hough Transform) data. The computer simulations and the optical experiments by using the HT CGH(Computer Generated Hologram) filter is perfermed. The results are very similar to those of the computer simulation results.

In this paper, a transimpedance optical receiver based on PIN/P-HEMT with cascoded input stage and inductor peaking technique was designed for several giga bits optical communication. Analysis of the receiver shows that cascoded input stage with inductor peaking increase bandwidth without sacrificing low frequence gain. The receiver achieved a low noise characteristic and maximally flat frequence response. It is shown that the 3-dB bandwidth of the designed receiver is 8.3 ㎓ and input equivalent noise current is as low as 16pA/√Hz to 10㎓.

We report dimension-reduced and photon-induced quantum rings naturally formed in a vertical-cavity-like active microdisk plane due to Rayleigh＇s band of whispering gallery modes. The √T- dependent redshift, microampere-range threshold currents, λ/2 lightwave ordering, and chaotic properties are also discussed.

As low-cost optical waveguides of optical interconnects, we fabricate multimode optical waveguides using a molding process The core size of a optical waveguide is 47 ${\mu}{\textrm}{m}$ $\times$ 41 ${\mu}{\textrm}{m}$. We use the photoresist AZ9260 as a master, polydimethyl-siloxane (PDMS) as a mold. In transferring process to polymeric material, we employ a modified micro-transfer molding process. All processes are simple and low-cost.

In this paper, we report characteristics of a internal chip of LiNbO$_3$ modulator with low-driving-voltage at 150nm wavelength. A Ti diffusion method for LiNbO$_3$ optical waveguide and a buffer layer for improving phase velocity mismatch between optical and microwave waves were employed. The traveling-wave coplanar waveguide electrode of 35mm is used for reducing the driving voltage. From this work, wideband modulation of 10㎓ and low-driving voltage of 3.9volts are realized.

This paper describes a point matching method that is based on an expansion of the electromagnetic field in terms of a series of Bessel and modified Bessel functions multiplied by trigonometric functions. In this method, the electric and magnetic fields inside the waveguide core are matched to those outside the core at matching points on the boundary to yield matrix equations. As an example applying this method, the paper presents the results of the computation in the form of curves of the propagation constants in a semicircular optical waveguide, be formed by annealing for reduced insertion(radiation) loss when connected to optical fiber. The propagation curves are presented in a form of refractive index independent. Also, it presents relative energy distributions between inside the core and outside the core of various modes and presents field distributions.

Currently, the most important technology is compression methods in the multimedia society. In audio compression, the method using human auditory nervous property is used. This method using psychoacoustical model is applied to perceptual audio coding, because human's audibility is limited. MPEG-II AAC(Advanced Audio Coding) is the most advanced coding scheme that is of benefit to high quality audio coding. The compression ratio is 1.4 times compared with MPEG-I layer-III. In this paper, the vector processor for MDCT/IMDCT(Modified Discrete Cosine Transform /Inverse Modified Discrete Cosine Transform) of MPEG-II AAC is designed.

In this paper, a new high speed parallel input and parallel output GF(2$^{m}$ ) multiplier based on standard basis is proposed. The concept of the multiplication in standard basis coordinates gives an easier VLSI implementation than that of the dual basis. This proposed algorithm and method of implementation of the GF(2$^{m}$ ) multiplication are represented by two kinds of basic cells (which are the generalized and fixed basic cell), and the minimum critical path with pipelined operation. In the case of the generalized basic cell, the proposed multiplier is composed of $m^2$ basic cells where each cell has 2 two input AND gates, 2 two input XOR gates, and 2 one bit latches Specifically, we show that the proposed multiplier has smaller complexity than those proposed in 〔5〕.

At each iteration, the path is either extended by adding a new node, or contracted by deleting its terminal node. When the destination becomes the terminal node of the path, the algorithm terminate. In the process of finding the shortest path to given destination, the algorithm visits other node, there by obtaining a shortest path from the origin to them. We show here that when the auction algorithm is applied to this equivalent program with some special rules for choosing the initial object prices and the person submitting a bid at each iteration, one obtains the generic form of the $\varepsilon$-relaxation method. Thus, the two methods are mathematically equivalent

본 논문에서는 DSP 기능을 내장한 32비트 RISC 마이크로프로세서를 위한 버스 제어기를 설계하였다. 연구의 초점은 버스 타이밍, 주소 멀티플렉싱, 리프레쉬, 버스 중재 등을 제어하는 버스제어기를 온칩화 하여 CPU로 하여금 외부 램과 추가적인 장치없이 직접 연결될 수 있도록 한 것이다. 버스 제어기가 관리하는 메모리의 종류는 SRAM, ROM, DRAM, EDO DRAM이며 고속 모드(Fast page mode, EDO page mode 및 RAS-down mode)기능을 지원하며 다양한 Wait를 넣을 수 있다. 주소 영역은 4가지(EMAO-EMA3)이며 내부적으로 7개 의 레지스터가 있고 이들을 이용하여 서로 연결된 세 개의 상태 머신으로 모든 램과의 타이밍을 제어함으로써 공유블록을 활용할 수 있었다. Verilog HDL의 기술하고 Synopsys로 합성한 후 타이밍 검증을 수행한 결과 최악조건에서 53.1㎒로 동작할 수 있었다. 그 후 0.6㎛ single poly triple metal process 공정으로 레이아웃 되었고 면적은 44㎜ × 1.21㎜ 이다.

본 논문에서는 내장형 응용에 적합한 RISC 마이크로프로세서와 DSP 프로세서의 기능을 유기적으로 결합한 구조를 연구하고 이를 설계한다. 프로그램의 크기를 줄이기 위해 RISC 명령어는 16비트 명령어 집합을 설계하고 분기 명령어로 인한 손실을 줄이기 위해 한 개의 지연 슬롯을 갖고 있다. DSP 명령어는 32비트 길이를 갖고 한 명령어로 곱셈, 덧셈(뺄셈), 두 가지 데이터 이동을 할 수 있어서 한 사이클에 최대 네 가지 동작을 할 수 있다 파이프라인 단계는 IF, ID, EX, MA, WB/DSP의 다섯 단계로 구성된다. DSP 기능을 지원하기 위해 내부 루프 버퍼를 갖고 정수 실행부에서는 주소 발생을 위한 전용 하드웨어와 DSP 유닛에서는 곱셈 및 누적 기능을 지원하기 위한 17 × 17 비트 곱셈기가 내장된다. 제안된 구조의 설계는 Verilog-HDL을 이용하여 top-down 설계 방식으로 설계되었고 각 기능 검증을 마친 후 3.3V, 0.6㎛ CMOS triple metal single poly 공정을 이용하여 합성하고 레이아웃 하였다.

In this paper, we present simplified fault set which is made by analyzing fault relation to design specification in CMOS operational amplifier. The hard fault is easily modeled because an effect of hard fault is out of all design specification. However, the soft fault is not easily modeled because an effect of soft fault on design specification is varied according to position and depth of fault. We simulated hard and soft fault by HSPICE, varying threshold voltage and W/L ratio from 90% increase to 90% decrease. The decrease of test time and the production of high reliability mixed-mode IC are possible by the proposed fault set.

A 3.3V PLL(Phase Locked loop) is designed for a high frequency, low voltage, and low power applications. This paper proposes a new PLL architecture to improve voltage to frequency linearity of VCO(Voltage controlled oscillator) with new delay cell. The proposed VCO operates at a wide frequency range of 30MHz~1㎓ with a good linearity. The DC-DC voltage up/down converter is utilized to regulate the control voltage of the two-stage VCO. The designed PLL architecture is implemented on a 0.6${\mu}{\textrm}{m}$ n-well CMOS process. The simulation results show a locking time of 2.6$\mu$sec at 1Hz, Lock in range of 100MHz~1㎓, and a power dissipation of 112㎽.

A 20 MHz CMOS continuous low-pass filter using simulated floating inductor consisted of two fully-differential transconductors and a capacitor is presented. The theory of operation is described and simulation results show close agreement between predicted behaviour and experimential performance. Simulation results show that the filter has ripple bandwidth of 22 MHz, pass-band ripple of 0.36 ㏈. and cutoff frequency of 26 MHz at supplay voltage of $\pm$3 V. The power dissipation is 19.2 ㎽.

A 200 MHz CMOS transconductor using translinear cells is presented. It adopts a cascade circuit consisting of a voltage follower(VF), a resistor, and a current follower(CF). The translinear cell which has substancely high-frequency is used as the VF and CF, respectively Simulation results show that the proposed transconductors have the 3-㏈ frequency of a 200 MHz, and the dynamic range of $\pm$2.5 V for a supply voltage $\pm$3 V.

In this paper, we investigate the effect of adopting branch-penalty compensation schemes on the power performance of TLBs(Translation Look-aside Buffers) and instruction caches. We found that the double-buffer branch-penalty compensation scheme can reduce the power consumption of the TLBs and the instruction caches considered by up to 14-21.3%. The power consumption is estimated through simulation at the architectural level, using the Kamble/Ghose method

In this paper, we propose a new method for power estimation in nodes of multi-level combinational circuits and describe its application to the extraction of common expressions for low power design. It is assumed that each node is implemented as a complex gate and the capacitance and the switching activity of the nodes are considered in the power estimation. Extracting common expressions which is accomplished mostly by the extraction of kernels, can be transformed to the problem of rectangle covering. We describe how the newly proposed estimation method can be applied to the rectangle covering problem and show the experimental results with comparisons to the results of SIS-1.2.

In tills paper, we design it decoder for the FLEX high speed paging protocol. The decoder that we design consists of a synchronizer, a de-interleaver, a error corrector and a packet builder In the FLEX protocol, a word is coded using HCH algorithm. In this design, we do not use a look-up table in order to decrease a chip area of the BCH decoder. The simulation result shows that the decoder is correctly designed

This paper proposed a method to detect and locate coding errors in HDL behavioral descriptions (designs). The target coding errors are the ones that the compiler cannot find out. As the method, this paper used verification pattern generation method. Thus, an algorithm to generate the verification patterns was proposed, in which the pattern generation is performed by a path- searching method. Various example designs were applied to this algorithm to verify the correctness and effectiveness of the proposed method.

In this paper, we addressed the problem of reducing the switching activity in pipeline datapath and proposed a solution. clock-gating method is a kind of practical technique for reducing switching activity in finite state machine. But, in the case that the target gated function unit has a pipeline structure, there is some spurious switching activity on each stage register group. This occur in early stage of every function enable cycle. In this paper we proposed a method to solve this problem. This method generates the enable signal to each pipeline stage to gate the clock feeding register group. Experimental results showed effective reduction of dynamic powers in pipeline circuits.

A new frequency-variant equivalent circuit model of power/ground plane is presented. The equivalent circuit is modeled with grid cells. The circuit parameters of each cell were extracted by using Fasthenry. To verify the developed circuit model, its s-parameters are compared with the measured s-parameters 〔2〕 and the full-wave simulation-based s-parameters. Consequently, it is shown that our frequency-variant equivalent circuit model can accurately predict imperfect ground effects under the high frequency operation of electronic package.

It is essential to estimate an effective inductance in a ground plane of muliti-layer IC package system in order to determine the simultaneous switching noise of the package. A new method to estimate the effective ground inductance in multi-layer IC package is presented. With the estimated ground plane inductance values, maximum switching noise variations according to the number of simultaneously switching drivers are investigated by developing a new SSN model. These results are verified by performing HSPICE simulation with the 0.35${\mu}{\textrm}{m}$ CMOS technology.

A circuit model of silicon substrate coupling for CMOS RF-IC design is developed. Its characteristics are analyzed by using a simple RC mesh model in order to investigate substrate coupling. The coupling effects due to the substrate were characterized with substrate resistivity, oxide thickness, substrate thickness. and physical distance. Thereby the silicon substrate effects are analytically investigated and verified with simulation. The analysis and simulation of the model have excellent agreements with MEDICI(2D device simulator) simulation results.

As the result of enhancement of CAD, Design Automation and manufacturing technology, it's on the increasing complexity, integration ratio, data signals, and pin count to IC chips. This brings about difficulties of testing, and incresing test time. Now One of the most cost-consuming procedure as integration ratio increases is the testing step. In this paper, we propose a new method, “Efficient TP(test point) assignment algorithm” using “input grouping”, This is helpful method to reducing test length without losing fault coverage. Experimental results show that proposed method reduces test length remarkably and doesn't miss fault coverage, with low hardware overhead Increasing.

Among the compression methods of moving picture information, a motion estimation method is used to remove time-repeating. The Block Matching Algorithm in motion estimation methods is the commonest one. In recent days, it is required the more advanced high quality in many image processing fields, for example HDTV, etc. Therefore, we have to accomplish not by means of Partial Search Algorithm, but by means of Full Search Algorithm in Block Matching Algorithm. In this paper, it is suggested a structure that reduce total calculation quantity and size, because the structure using Bit Plane select and use only 3bit of 8bit luminance signal.

WWW is an important method for retrieving or providing informations. Not only the amount of information but also it is widely located on the web, it is difficult for users to get or search information. Furthermore, to use search engine is also inconvenient, because it just uses a keyword without concerning a user's interest. At this point, we propose a design of web agent that uses the automatic document categorization system and user's profile concerning with a user's interest, so the agent can actively provide a information.

소프트웨어로 실시간 구현이 어려운 MPEG-1, MPEG-2 인코딩을 LAN이나 전용선에서 클러스터 컴퓨터나 병렬 처리로 구현한 연구가 있어 왔다. 네트워크의 대역폭이 증가하고 라우터가 고속화됨에 따라 본 논문에서는 MPEG-2인코딩을 WAN으로 확장하는 기법을 제안하고 실험을 통하여 속도 개선 효과를 입증하였다.

This paper present the architecture and design of FFT processor for the OFDM modulation. The OFDM modulation have a merit that use frequecncy efficiently and robust ISI. It needs FFR to have fast and large number of points. Moreover, this FFT design has pipeline architecture. R2$^2$SDF architecture for FFT processor has more advantage others. Therefore this paper present FFT processor used R2$^2$SDF architecture.

Automatic human face detection in a complex background is one of the difficult problems In this paper. we propose an effective automatic face detection system that can locate the face region in natural scene images when the system is used as a pre-processor of a face recog- nition system. We use two natural and powerful visual cues, the color and the human head shape. The outline of the human head can be generally described as being roughly elliptic in nature. In the first step of the proposed system, we have tried the approach of fitting the best Possible ellipse to the outline of the head In the next step, the method based on the human skin color space by selecting flesh tone regions in color images and histogramming their r(＝R/(R＋G＋B)) and g(＝G/R＋G＋B)) values. According to our experiment. the proposed system shows robust location results

Turbo decoder were shown to achieve performance within 0.7㏈ of the Shannon capacity limit. This constituted a significant gain in power efficiency over other coding techniques known at the time. In this paper, Turbo code with constraint length K＝4, code rate 1/3, frame size 196bits(6 tail bits), 20㎳ frame and 6bit MAP decoder is implemented using VHDL. The designed Turbo code is used for voice service. Interactions of the system are used to attain large performance improvements.

In this paper, we propose a method to improve Genetic Algorithm using Boltzmann selection which Michael has suggested. But Michael uses temperature schedule(the initial temperature, the cooling rate), which can be applicable only to the limited range of problems. We propose a new method to find the critical temperature and the cooling rate as parameters of the temperature schedule. The critical temperature can be derived from the distribution of each individual＇s fitness. Through the application of the island model where each island has differing cooling rate, it is proved that it is unnecessary to find the optimal cooling rate. The simulation on the TSP＇s with various city sizes proves the proposed critical temperature correct.

디지털 컨텐츠의 정보보호는 근래 매우 중요한 기술로 등장했다. 애써 만든 디지털 컨텐츠가 무차별적으로 복제되어 배포되면 컨텐츠 제공자에게는 커다란 경제적 손실을 입히기 때문에 이를 보호하려는 기술이 개발되고 있다. 특별히 DVD나 MP3, AAC 등 네트워크 환경에서 고급 품질의 영상이 품질의 손상 없이 복제되어 네트워크를 통해 클릭 한 번으로 배포될 수 있기 때문에 이에 대한 대처가 시급한 실정이다. 따라서, 이에 대한 해결책으로 타원곡선 암호시스템을 사용하는 상황에서 필요한 갱신가능 구조를 고려한 Massey-Omura 곱셈기를 제안한다.

This paper presents an authoring system for users to create and edit multimedia documents more easily. Our system supports dynamic authoring to feedback the inconsistency that could be occurred when users authorize and flexible media synchronization. For these, we define a new time relation based on causal relation and provide an internal representation using trees and structured document parsing. The system consists of the components such as visual interface, parsing, and presentation engine. It has been implemented on Microsoft Windows 95 with Visual C++.

본 글은 soft computing에 대해 설명하고, soft computing의 주요 분야인 퍼지 이론에서 2가지 형태의 퍼지모델의 융합과, 퍼지이론과 진화적 알고리즘의 융합에 대해 설명한다.

We introduce an evolutionary approach to on-line learning for mobile robot control using reconfigurable hardware. We use genetic programming as an evolutionary engine. Control programs are encoded in tree structure. Genetic operators, such as node mutation, adapt the program trees based on a set of training cases. This paper discusses the advantages and constraints of the evolvable hardware approach to robot learning and describes a FPGA implementation of the presented genetic programming method.

In this paper, we propose a new neural network based on the DNA coding method. The initial population of the structure information and the weights for the neural network is generated, and then the descendants are chose with the Elitist selection by the genetic algorithm. The evolutionary technique and the suitable fitness measure are used to find a neural network with the fractal number of layers. which represents a good approximation to the given function.

In this paper, we proposed an block-based evolvable neural network(BENN). The BENN can optimize it＇s structure and weights simultaneously. It can be easily implemented by FPGA whose connection and internal functionality can be reconfigured. To solve the local minima problem that is caused gradient descent learning algorithm, genetic algorithms are applied for optimizing the proposed evolvable neural network model.

Rapid progress in the modeling of biological structures and simulation of their development has occurred over the last few years. Cellular automata (CA) and Lindenmayer-system(L-system) are the representative models of development/morphogenesis of multicellular organism. L-system is applied to the visualization of biological plant. Also, CA are applied to the study of artificial life and to the construction of an artificial brain. To design the L-system and CA automatically, we make this model evolve. It is necessary to code the developmental rules for evolution. In this paper, we propose a DNA coding method for evolution the models of development/morphogenesis of biological multicellular organisms. DNA coding has the redundancy and overlapping of gene and is apt for the representation of the rule. In this paper, we propose the DNA coding method of CA and L-system.

Neural networks for adaptive channel equalizers have been resorted to recently in digital communication systems. In this paper, the characteristics and the application areas and etc. for neural networks as adaptive channel equalizers are examined through simple examples.

Genetic algorithm is an efficient search method using principles of natural selection and population genetics. In conventional genetic algorithms, however, the size of gene pool should be increased to insure a convergency. Therefore, many memory spaces and much computation time were needed. Also, since child chromosomes were generated by chromosome crossover and gene mutation, the algorithms have a complex structure. Thus, in this paper, a compact stereo matching algorithm using a population-based incremental teaming based on probability vector is proposed to reduce these problems. The PBIL method is modified for matching environment. Since the Proposed algorithm uses a probability vector and eliminates gene pool, chromosome crossover, and gene mutation, the matching algorithm is simple and the computation load is considerably reduced. Even if the characteristics of images are changed, stable outputs are obtained without the modification of the matching algorithm.

In this paper, we could analyze and compare with the generalized Recurrent neural networks and the Recurrent neural networks applying the fuzzy. The total system is digitalized in order to be filtering the image, and the fuzzy is applied to the generalized Recurrent in order to be fast the operation speed. So the fuzzified Recurrent neural networks are completely removed to the included noise in the image, and could converge on a certain value as controlling the weight and iteration frequency corresponding to the desired target value. Also, that values are compared and analysed using MSE and PSNR. When applying to the image which is included to the noise in the generalized Recurrent and the Recurrent applying the fuzzy, the Recurrent applying the fuzzy is shown the superiority at the noise and the fixed convergence part through MSE and PSNR in the computer simulations.

In this paper we proposed a heterogeneous hidden layer consisting of both sigmoid functions and RBFs(Radial Basis Function) in multi-layered neural networks. Focusing on the orthogonal relationship between the sigmoid function and its derivative, a derived RBF that is a derivative of the sigmoid function is used as the RBF in the neural network. so the proposed neural network is called ONN(Orthogonal Neural Network). Identification results using a nonlinear function confirm both the ONN＇s feasibility and characteristics by comparing with those obtained using a conventional neural network which has sigmoid function or RBF in hidden layer

본 논문에서는 웨이브렛 신경회로망을 사용하여 알려지지 않은 비선형 시스템을 안정하게 적응 제어하는 문제를 다룬다. 비선형 시스템의 정확한 제어는 함수를 근사화하는 데 사용된 함수 근사화기의 정확성과 효율성에 의존한다. 이에 비선형 시스템 제어에 기준 함수의 선택이 자유롭고 함수 근사화 능력이 뛰어난 웨이브렛 신경회로망을 사용한다. 초기 웨이브렛 신경회로망 제어기 설정은 웨이브렛 신경회로망 변수인 신축과 이동 값을 제어기 입력의 시-주파수 특성을 분석해서 구하고, 연결강도는 Lyapunov 안정성 이론에 기초한 적응 법칙을 사용하여 조절한다. 이를 비선형 시스템인 역 진자 시스템에 적용한다.

In this paper, a research is focused on implementation of the handwritten Korean-character recognition system using a neural coprocessor for PDA application. The proposed coprocessor is composed of a digital neural network called DMNN and a RISC-based dedicated controller in order to achieve high speed as well as compactness. Two neural networks are used for recognition, one for stroke classification out of extended 11 strokes and the other for grapheme classification. Our experimental result shows that the successful recognition rate of 92.1% over 3,000 characters written by 10 persons can be obtained. Moreover, it can be improved to 95.3% when four candidates are considered. The design verification of tile proposed neural coprocessor is conducted using the ASIC emulator for further hardware implementation.

This paper describes a medular neural network(MNN) for a vision system which tracks a given object using a sequence of images from a camera unit. The MNN is used to precisely recognize the given robot endeffector and to minize the processing time. Since the robot endeffector can be viewed in many different shapes in 3-D space, a MNN structure, which contains a set of feedforwared neural networks, co be more attractive in recognizing the given object. Each single neural network learns the endeffector with a cluster of training patterns. The training patterns for a neural network share the similar charateristics so that they can be easily trained. The trained MNN is less sensitive to noise and it shows the better performance in recognizing the endeffector. The recognition rate of MNN is enhanced by 14% over the single neural network. A vision system with the MNN can precisely recognize the endeffector and place it at the center of a display for a remote operator.

In this paper, we analyze weight distributions of neural networks. If we construct a vector containing all weights of a neural network, then training process can be viewed as finding a solution point in the weight space. In order to obtain insight into the training process of neural networks, we investigate the distribution of the solution points in the weight space Experiments provide some interesting results, showing that solution points tend to form clusters in the weight space and the information may be used to speed up the training process.

Data broadcasting service is essential for the widespread deployment of the emerging DTV which can provide various new services, especially program related, computer-like data services. We analyze DVB and ATSC efforts and propose a data broadcasting model which is supposed to be included in Korea DTV specification.

음성의 인식율 저하는 주로 잡음에 의해 발생하고, 이러한 요인을 제거하기 위해 주로 필터뱅크를 사용하여 왔지만, 본 논문은 2 차원 선형예측이라는 영상 특징 추출 방법을 이용하여 잡음에 강인한 숫자 음 인식을 시도하였다. 먼저, 음성에 대한 인식결과를 도출하기 위해, 13 차 선형예측 계수를 이용하여 인식을 시도하였다. 이 때, 잡음을 추가한 음성을 이용하여 시험한 결과, 5 개의 숫자음, ‘영’, ‘사’, ‘오’, ‘육’, ‘구’에서 인식결과의 저하를 볼 수 있었다. 이러한 결과를 향상시키기 위해 2 차원 선형예측 계수를 추가한 인식기 입력 데이터를 구현하였다. 이 때, 선형예측 계수는 각 프레임별로 추출하였고, 음성데이터와 합한 영상 데이터를 가지고 인식 실험을 실시하였다. 이 때, 숫자음 ‘사’ 와 ‘구’ 에 대해서는 상당한 향상을 보였다.

Gaze detection is to find out the position on a monitor screen where a user is looking at, using the image processing and computer vision technology, We developed a computer interface system using the gaze detection technology, This system enables a user to control the computer system without using their hands. So this system will help the handicapped to use a computer and is also useful for the man whose hands are busy doing another job, especially in tasks in factory. For the practical use, command signal like mouse clicking is necessary and we used eye winking to give this command signal to the system.

Specially, form-based documents are easily understood, quickly processed and thus used more than the general documents. In this paper, a method to classify the documents with minimum features is proposed, not like former methods which use all possible features. To apply this characteristics. a document was first partitioned to areas of certain shape and size, then features were extracted from the partitioned area. It is also possible to sort the partitioned area by using the fact that each partitioned area has the different significance in the point of feature. In conclusion, by using proposed method of extracting features from partitioned document, the processing time decreases due to search area reduction.

디지털 TV가 2000년대의 주력으로 부상할 것임에는 이론의 여지가 없다. 그런데, 디지털 TV가 시장에 진입하기도 전에 대화형 TV 기능을 추가하지 않으면 안될 것으로 보인다. 디지털 TV는 여전히 단방향 방송기술에 의존하지만, 인터넷 기술 발전으로 사용자는 양방향 서비스를 요구할 것이 분명하기 때문이다. 이미 선진 각국은 양방향 TV를 개발하기 위해 다양한 노력을 경주하고 있다. 그런데, 대화형 TV의 개념이 최근 출현했기 때문에 어떤 기술이 어느 방향으로 발전할지 예측하는 것이 사실상 거의 불가능하다. 기존의 TV 기술은 최소한 30년 이상 존속될 표준에 근거해서 개발되었지만, 하루가 다르게 변화하는 인터넷 기술 표준에 바탕을 두고 제품을 개발해야 하는 특성 때문에 기술개발이 더 어렵다고 할 수 있다. 이 논문은 급변하는 방송환경에 적응할 수 있는 대화형 TV의 개념과 모델을 소개한다. 그리고 세계 각국의 개발 동향을 아울러 살펴보기로 한다.

During the last decade, high quality digital audio has essentially replaced analog audio. During this period, digital audio have applied many application areas of the info-industry. These applications have created a demand for high quality digital audio. In audio compression, the methods using human auditory nervous properties are used and introduced from psychoacoustical model utilized perceptual audio coding unable to code above the limitation of human perception. The discussion concentrates on architectures and applications of those techniques which utilize psychoacoustical models to exploit efficiently masking characteristics of the human receiver. In this paper, the designed MDCT/IMBCT as a standard of current MPEG is implemented onto FPGA.

In this paper we designed a service composition architecture which enables the functional extension of existing service or the creation of new service by combining more than one service. The designed composition architecture is based on the service architecture of the TINA-C. It is designed by extending TINA information model and computational model. Composition related object, relations and interface between objects are defined in the information model and the computational model. And we tested the designed architecture by implementing two multimedia service and composition the services.

MPEG-2 AAC(Advanced Audio Coding) is the most advanced coding scheme available for high quality audio coding. This MPEG-2 AAC audio Standard allows for ITU-R ‘indistinguishable’ quality according to at data rates of 320 kb/s for five full-bandwidth channel audio signals. The compression ratio is around a factor of 1.4 better compared to MPEG Layer 3, you get the same quality at 70% of the bitrate. This paper suggest optimization method for MDCT/IMDCT (Modified Discrete Cosine Transform/Inverse Modified Discrete Cosine Transform) in Encoder and Decoder for AAC.

In this paper, we developed a radial pulse transducer that has strain-gauge cantilever type load cell for total pulse detection on chongu arterial. The transducer consist of load cell and driving electronic circuits. Load cell consist of cantilever and two metal film strain gauge. The Pressure signal from chongu artery is delivered to load cell using artery rider that attached to cantilever Therefore the pressure signal convert to voltage signals by the developed transducer As the results of experiment, the developed transducer has very good linearity at pressure to voltage conversion. The total pulse detection transducer can detected three kinds of chongu artery pulse with conveniently.

In this paper, Ire present the result of feature points recognition and classification of radial pulse by the shape of pulse wave. The recognition algorithm use the method which runs in parallel with both the data of ECG and differential pulse simultaneously to recognize the feature points. Also we specified 3-time elements of pulse wave as main parameters for diagnosis and measured them by execution of algorithm. then we classify the shape of radial pulse by existence and position of feature points.

In this paper, we developed on internet based assembly information display system for the blind. The system is consist of hardware and software. The hardware is consist of a voice synthesis device and a tactile display for character information, and the software is consist of internet web browser for the blind and braille program. The tactile-device system consists of a control unit, pin array, pin generator, serial port, and a power supply. The pin exerted by a electromagnetic method, solenoid. The internet web browser separates the character and image from internet web page, and character information in the web page is converted to braille and fed to sound system. Also the image in the web page can be printed developed tactile display. As the results of experiment, the blind could access the internet web site by using this system and understand various internet information.

The functional diagnosis instrument should be preceded first to both the accurate selection of exact acupoint and discrimination. so the measuring and stimulating method are improved to SPAC pattern to evaluate impedance existed in the body. As a result, the resistance factor between skin and probe, the dipolization of cell was reduced so that the judgement of acupoint is advanced. After extraction of optimization parameter of SPAC pattern which the high discrimination efficiency and the lowest affection on the human body is controlled by using microprocessor to enhance conviction. The discrimination efficiency was confirmed by meridian visualization system. Also mechanism of probe was improved to increase efficiency of image recognition processing. The image of discriminated acupoint with probe is obtained by using a camera, the location on the tip of probe is recognized and processed. And then these are converted to virtual color by proportional to measuring current level of scan point on skin.

New methods for both color palette design and dithering based on human visual system (HVS) characteristics are proposed. Color quantization for palette design uses the relative visual sensitivity and spatial masking effect of HVS. The dithering operation for printing uses nonlinear quantization, which considers the overlapping phenomena among neighbor printing dots, and then a modified dot-diffusion algorithm is followed to compensate the degradation produced in the quantization process. The proposed techniques can produce high quality image in the low-bit color devices.

The principal features of a face are as follows : skin-tone, symmetry, and requisites such as shape of ellipse, eyes, nose, mouth. Also, faces have different size, various shape and position. In case of application of face recognition and detection without preprocessing, efficiency of the performance is decreased. In addition, face itself, complex background, image quality, etc. are included. Therefore, previous face recognition methods are implemented on the base of specific constraints of the face image. In this paper, we propose the efficient and automatic face detection algorithm for minimizing influence such as complex background, image quality, etc. This face detection technique consists of skin-tone, candidate face region and face region extractions.

In this paper, we propose a human face detection algorithm using adaptive skin color model and neural networks. To attain robustness in the changes of illumination and variability of human skin color, we perform a color segmentation of input image by thresholding adaptively in modified hue-saturation color space (TSV). In order to distinguish faces from other segmented objects, we calculate invariant moments for each face candidate and use the multilayer perceptron neural network of backpropagation algorithm. The simulation results show superior performance for a variety of poses and relatively complex backgrounds, when compared to other existing algorithm.

In this paper, the wavelet transform is performed in the input 256$\times$256 color image and decomposes a image into low-pass and high-pass components. Since the high-pass band contains the components of three directions, edges are detected by combining three parts. After finding the position of face using the histogram of the edge component, a face region in low-pass band is cut off. Since RGB color image is sensitively affected by luminances, the image of low pass component is normalized, and a facial region is detected using face color informations. As the wavelet transform decomposes the detected face region into three layer, the dimension of input image is reduced. In this paper, we use the 3000 images of 10 persons, and KL transform is applied in order to classify face vectors effectively. FCM(Fuzzy C-Means) algorithm classifies face vectors with similar features into the same cluster. In this case, the number of cluster is equal to that of person, and the mean vector of each cluster is used as a codebook. We verify the system performance of the proposed algorithm by the experiments. The recognition rates of learning images and testing image is computed using correlation coefficient and Euclidean distance.

Gaze detection is to locate the position on a monitor screen where a user is looking at. We implement it by a computer vision system setting a camera above a monitor, and a user move (rotates and or translates) her face to gaze at a different position on the monitor. Up to now, we have tried several different approaches and among them the Two Neural Network approach shows the best result which is described in this paper (1.7 inch error for test data including facial rotation. 3.1 inch error for test data including facial rotation and translation).

In this paper, we present a joint quality control system to be able to accurately control the relative picture quality among the video programs in terms of PSNR. The joint quality control system allows variable bit rate (VBR) for each video program to maintain the pre-determined relative picture quality among the aggregated video programs while keeping a constant sum of the bit rates for all programs to be transmitted over a single constant bit rate (CBR) channel. This is achieved by simultaneous controlling the video encoders to generate VBR video streams at the central controller. Furthermore we also suggest buffer regulation method based on the analysis of the constraints imposed by sender/receiver buffer sizes and total transmission rate. Through various simulation results, it is found that our quality control systems guarantee that the video buffers do not overflow and underflow and the quality control errors do not exceed 0.1 ㏈.

TMN5 used to test the performance of H.263 is a DCT-based H.263 which DCT is used as transform coding, but DWT is used instead of DCT and adaptive quantizer of being appropriate to DWT is designed in this paper while the structure of TMN5 is maintained. DWT-based H.263, which is proposed in this paper, is excellent in transplantation of the existing system and can improve frame rate by transmitting more Frame. Also, the average PSNR, objective quality of image, has been lost at degree of average 0.35㏈ in luminance signals, but has been improved over a average of 2㏈ in chrominance signals. Subjective quality of image has been improved as blocking effect, which has seriously occurred in DCT based H.263, is diminished. DWT-based H.263 can. therefore. advance video quality of image comparing with the existing ways.

We propose a new hierarchical motion estimator architecture that supports the advanced prediction mode of recent low bit-rate video coders such as H.263 and MPEG-4. In the proposed VLSI architecture, a basic searching unit (BSU) is commonly utilized for all hierarchical levels to make a systematic and small sized motion estimator. Since the memory bank of the proposed architecture provides scheduled data flow for calculating 8$\times$8 block-based sum of absolute difference (SAD), both a macroblock-based motion vector (MV) and four block-based MVs are simultaneously obtained for each macroblock in the advanced prediction mode. The proposed motion estimator gives similar coding performance compared with full search block matching algorithm (FSBMA) while achieving small size and satisfying the advanced prediction mode.

A conventional image coder, such as JPEG, requires not only DCT and quantization but also additional pre-filtering under noisy environment. Since the pre-filtering removes camera noise and improves coding efficiency dramatically, its efficient implementation has been an important issue. Based on well-known noise removal techniques in image processing fields, this paper introduces an efficient scheme by adapting a noise removal procedure to block-based image coders. By using two-dimensional DCT factorization, the proposed image coder has only a modified DCT and a VLC, and performs pre-filtering and quantization simultaneously in the modified DCT operation.

Our present ability to work with video has not been confined to wired communication environment. This paper describes the new technological trend of wireless video communication. In wireless video communication, unlike wired network, several techniques are needed. At first, error robust video coding is essential. Due to characteristics of wireless channel, the system is exposed to more error prone environment. In addition, encoded video bit streams are vulnerable to the error because of the entropy coding. Recently many frameworks are developed to cope with this problem. We just explore the numerous robust video coding approaches with the viewing of error control. And more we discuss other on going research topics in this wireless video communication fields like low-power assumption design, trans-codec technique, and rate control schemes in brief.

In this paper, a object detection and tracking algorithm is presented which exhibits robust properties for image sequences with complex background. The proposed algorithm is composed of three parts: moving object detection, object tracking, and motion analysis. The moving object detection algorithm is implemented using a temporal median background method which is suitable for real-time applications. In the motion analysis, we propose a new technique for removing a temporal clutter, such as a swaying plant or a light reflection of a background object. In addition, we design a multiple vehicle tracking system based on Kalman filtering. Computer simulation of the proposed scheme shows its robustness for MPEG-7 test image sequences.

This paper describes a new semi-automatic segmentation algorithm based on color information. Semi-automatic segmentation mainly consists of intra-frame segmentation and inter-frame segmentation. While intra-frame segmentation extracts video objects of interest from boundary information provided by the user and intensity information of the image, inter-frame segmentation partitions the image into the video objects and background by tracking the motion of video objects. For inter-frame segmentation, color information (Y, Cb and Cr) of the current frame can be used efficiently in order to find the exact boundary of the video objects. In this paper we propose a new region growing algorithm which can maximize the ability of region differentiation, while preserving features of each color component.

As the information society is advanced, the needs for mass information storage and retrieval grows. Digital image information is stored in retrieval systems, broadcasting in television transmission and exchanged over several kinds of telecommunication media. A major problem is that digital images are represented with large amount of data. The useful feature of image compression is that transmitting rapidly a lot of data in less time. Therefore we proposed a parallel Fractal trans-formation unit in Fractal Image compression system.

For depth extraction from the focus and recovery the shape, determination of criterion function for focus measure and size of the criterion window are very important. However, Texture, illumination, and magnification have an effect on focus measure. For that reason, depth map has a partial high and low peak. In this paper, we propose a depth extraction method from focused images using the error interpolation. This method is modified the error depth into mean value between two normal depth in order to improve the depth map.

In this work, a new algorithm for canceling MRI artifact in the image plane is presented. In the conventional approach, the motions in the X(readout) direction and Y(the phase encoding) direction are estimated simultaneously. However, the feature of each X and Y directional motion is different. First, we notice that the X directional motion corresponds to a shift of the X directional spectrum of the MRI signal, and the non zero area of the spectrum just corresponds to X axis projected area of the density function. So the motion is estimated by tracing the edges of the spectrum, and the X directional motion is canceled by shifting the spectrum in inverse direction. Next, the Y directional motion is canceled using a new constraint, with which the motion component and the true image component can be separated. This algorithm is shown to be effective by simulations.

도로 위에 설치된 카메라에서 검지 영역의 데이터를 입력받아 통과 차량수, 도로 점유율, 차량속도, 차간 거리 등의 교통정보를 실시간으로 산출하는 기법은 지능형 교통정보 시스템(ITS)의 핵심 분야이다. 본 논문에서는 검지영역의 시공간 영상 분석에 의해 다양한 기상 조건과 그림자 등의 환경의 변화에 민감하지 않은 교통정보 산출기법을 제안한다.

There exist geometrically invariant relations in single-view images under a specific geometrical structure. This invariance may be utilized for 3D object recognition. Two types of invariants are compared in terms of the robustness to the variation of the feature points. Deviation of the invariant relations are measured by adding random noise to the feature point location. Zhu’s invariant requires six points on adjacent planes having two sets of four coplanar points, whereas the Kaist method requires four coplanar points and two non-coplanar points. Experimental results show that the latter method has the advantage in choosing feature points while suffering from weak robustness to the noise.

In this paper, we propose a feature extraction method based on Bhattacharyya distance for multiclass problems. The Bhattacharyya distance provides a valuable information in determining the effectiveness of a feature set and has been used as separability measure for feature selection. Recently, a feature extraction algorithm hat been proposed for two normally distributed classes based on Bhattacharyya distance. In this paper, we propose to expand the previous approach to multiclass cases. Experiment results show that the proposed method compares favorably with the conventional methods.

In this Paper, we propose an optimal feature extraction for multiclass problems through proper choice of initial feature vectors. Although numerous feature extraction algorithms have been proposed, those algorithms are not optimal for multiclass problems. Recently, an optimal feature extraction algorithm for multiclass problems has been proposed, which provides a better performance than the conventional feature extraction algorithms. In this paper, we improve the algorithm by choosing good initial feature vectors. As a result, the searching time is significantly reduced. The chance to be stuck in a local minimum is also reduced.

In this paper we propose an emotional expression method using a comic model and special marks for effective sign-language communications. Until now we have investigated to produce more realistic facial and emotional expression. When representing only emotional expression, however, a comic expression could be better than the real picture of a face. The comic face is a comic-style expression model in which almost components except the necessary parts like eyebrows, eyes, nose and mouth are discarded. In the comic model, we can use some special marks for the purpose of emphasizing various emotions. We represent emotional expression using Action Units(AU) of Facial Action Coding System(FACS) and define Special Unit(SU) for emphasizing the emotions. Experimental results show a possibility that the proposed method could be used efficiently for sign-language image communications.

In this paper we design a key-frame editor for 3D sign-language animation using the inverse kinematics. Using the editor, we can calculate the joint angles for two arms automatically. Up to now we have computed the values of the joint angles using the forward kinematics, where we have determined the values heuristically based on our experiences. To overcome the drawbacks, we employ the arm transformation matrix of the inverse kinematics. Experimental results show a possibility that the proposed method could be used for making up the sign-language communication dictionaries.

웨이브렛 이론은 응용수학에서 처음 소개된 후 다중해상도 표면 및 이산신호의 부대역 분해방법 등에 대한 단일화된 이론을 제공하고 있으며 최근 신호처리 전반에 걸쳐 널리 이용되고 있는 이론이다. 본 논문에서는 최근 들어 신호저리분야의 새로운 기법으로 제시된 웨이브렛 이론에 대한 소개와 더불어 이를 이용하여 음성개선, 유성음/무성음/묵음 판별, 끝점검출, 피치 및 성문 폐쇄시점 검출 등의 음성신호처리에 적용한 예들을 소개한다.

As the number of reference patterns increase in the text dependant speaker recognition, the recognition performance of the system degrades. So, if reference patterns were decreased the high recognition rate can be obtained. It’s because the speaker recognition can obtain the high discrimination. In this paper, to decrease the number of reference patterns, we choose candidate reference patterns to perform pattern matching with test pattern by high order component of the reflection coefficients of the uttered speech signal Consequently the total recognition rate of the proposed method is about 2% higher than that of the conventional method.

We report the new method for speaker recognition. Until now, many researchers have used HMM (Hidden Markov Model) with cepstral coefficient or neural network for speaker recognition. Here, we introduce the method of speaker recognition using eigenspace. This method can reduce the training and recognition time of speaker recognition system. In proposed method, we use the low rank model of the speech eigenspace. In experiment, we obtain good recognition result.

본 논문에서는 음소별 코드북 개수의 선택과 벡터 양자화에 따른 음소 인식률과 고립단어 인식률에 대하여 다룬다. 음성모델은 이산 확률 밀도를 갖는 DHMM(Discrete Hidden Markov Model)을 사용하였으며, 코드북 생성과 벡터 양자화 알고리즘으로는 K-means 알고리즘과 LBG(Linde, Buzo, Gray) 알고리즘을 사용하였다 음소별 코드북 개수와 벡터 양자화를 최적화함으로써 음소 인식률을 향상시킬 수 있으며, 그 결과 안정된 고립단어 인식률을 얻을 수 있다.

This paper proposes the LSF or LSP that is the method of using to transfer the speech parameters after processed the speech to LPC, which is digital coding transferring efficiently, for the best quality and the lowest bit rate of parameters. The new revised transform algorithm between LSF and LPC coefficients is proposed. The proposed algorithm eliminates all multiplications, computes fewer operations, and reduces memory buffer sizes.

In this paper, we develop an active sonar signal synthesis model to analyze the detection performance of active sonar systems in a shallow water environment. Using this model, we synthesize the return signal of a bistatic sonar system at a typical operating frequency. This signal can be used to test proper active sonar signal processing techniques for real applications.

Many high-resolution algorithms based on the eigen-decomposition analysis of observed covariance matrix, such as MVE, MUSIC, and EVM, have been proposed. However, the resolution of spectral estimates for these algorithms is severely degraded when Signal-to-Noise Ratio (SNR) is low and arrival angles of signal are close to each other. And EVM and MUSIC is powerful for the characteristic of SNR. But have the limitation that the number of signals presented is known. While MVE is bad the characteristic of SNR. In this study, we propose a modified MVE to enhance the resolution for Direction-Of-Arrival (DOA) estimation of underwater acoustic signal. This is to remove the limitation that existing algorithms should know the information for the number of signals. Because the algorithms founded on the eigen value estimate DOA with only the noise subspace, they have the high-resolution characteristic. And then, with the method reducing the effect of the signal subspace, we are to reduce the degradation because of complementary relationship between the signal subspace and the noise subspace. This paper, with using the simulation data, we have estimated the proposed algorithms, compared it with other high-resolution algorithms. The simulation results show that the modified MVE proposed is accurate and has a better resolution even though SNR is low, under the same condition.

This paper presents a performance improvement technique of 2-D towed array shape estimation using Kalman filters. The proposed algorithm by linear model approximation corrects the position errors caused by the Kalman filter results. However, since the assumed linear model makes errors at bending parts, the spline interpolation algorithm based on curve is proposed to reduce the errors.

Passive noise reduction is a classical approach to attenuate industrial noise. But Active noise cancellation has several advantages over the passive noise cancellation. Such a system offers a better low frequency performance with a smaller and lighter system. This paper presents an active closed loop control system which consists of an controller for inverting and compensating the phase delay, an microphone for picking up the external noise, and loudspeaker for radiating the acoustic anti-phase signal to reduce external noise. The noise in the phase delay covered from 80$^{\circ}$ to 270$^{\circ}$ tends to be reduced. The degree of noise cancellation obtainable with this system reaches value about 17㏈.

It cannot be argued that speech is the most natural interfacing tool between men and machines. In order to realize acceptable speech interfaces, highly advanced speech recognizers and synthesizers are inevitable. Text-to-Speech(TTS) technology has been attracting a lot of interest among speech engineers because of its own benefits. Namely, the possible application areas of talking computers, emergency alarming systems in speech, speech output devices fur speech-impaired, and so on. Hence, many researchers have made significant progresses in the speech synthesis techniques in the sense of their own languages and as a result, the quality of currently available speech synthesizers are believed to be acceptable to normal users. These are partly why the MPEG group had decided to include the TTS technology as one of its MPEG-4 functionalities. ETRI has made major contributions to the current MPEG-4 TTS among various MPEG-4 functionalities. They are; 1) use of original prosody for synthesized speech output, 2) trick mode functions fer general users without breaking synthesized speech prosody, 3) interoperability with Facial Animation(FA) tools, and 4) dubbing a moving/animated picture with lib-shape pattern information.

MDCT( Modified Discrete Cosine Transform ) is one of the most compute-intensive operations in the MPEG audio coding standard. In this paper a fast algorithm to perform MDCT operation is presented. The algorithm presented in the MPEG audio coding standard requires (N/2) $\times$ N multiplications and (N/2) $\times$ (N-1) additions to generate the result, but the algorithm presented in this paper requires (N/2) $\times$ (N/2) multiplications and (N/2) $\times$ (N/2) additions to perform the same task. In this algorithm N should be multiple of 4. The algorithm was implemented using ARM processor and the processing time comparison between the original algorithm and the fast algorithm is presented.

In this paper we propose high quality audio coding algorithm using psychoacoustic modelling and the adaptive wavelet Packet decomposition. The bit allocation scheme exploits the remnants of temporal correlations that exist in the wavelet packet coefficients by SPIHT. The proposed algorithm achieve almost transparent coding of monophonic compact disk(CD) quality signals at about 44 kbps.

In this Paper, we Present a method for embedding digital watermarks into digital audio signals. The watermarking must be imperceptible and should be robust to attacks, such as filtering and compression etc. In our method, we adaptively embedded the watermarks changing the scale factor using the spread spectrum and MPEG-2 AAC psychoacoustic model.

In this paper, we designed a Circular Path Built-In Self Test circuit and embedded it into a simple 8-bit microprocessor. Register cells of the microprocessor have been modified into Circular Path register cells and each register cells have been connected to form a scan chain. A BIST controller has been designed for controlling BIST operations and its operation has been verified through simulation. The BIST circuit described in this paper has increased size overhead of the microprocessor by 29.8% and delay time in the longest delay path from clock input to output by 2.9㎱.

In this paper. we propose a system model and the associated control method for long distance connection using the High Performance Serial Bus, IEEE 1394. Though IEEE 1394-1995 Standard has connection distance limit of 4.5m, our proposed system can extend the limit further even without degrading network performance. And the current systems using IEEE 1394 don't have to make any change to use the proposed system.

In this Paper, Bit selectable and Bi-directional Interface Port is described, which can communicate data with the peripheral devices. Specially A description of the asynchronous design method is given to remove the clock skew phenomenon and the output asynchronous control method which finds the optimal clock and controls all the enable signal of the output pins at the same time is presented. Using this technique interface ports have delay time of less-than 0.5㎱.

This paper deals with a real time optimization algorithm within real time for DRGS(Dynamic Route Guidance System) and evaluate the algorithm. A pre-developed system offers the optimal route in using only static traffic information. In using real-time traffic information, Dynamic route guidance algorithm is needed. The serious problem in implementing it is processing time increase as nodes increase and then the real time processing is impossible. Thus, in this paper we propose the optimal route algorithm with window mechanism for the real-time processing and then evaluate the algorithms.

In this paper, We represent a low complexity of parallel canonical basis multiplier for GF( q$^{n}$ ), ( q＞ 2). The Mastrovito multiplier is investigated and applied to multiplication in GF(q$^{n}$ ), GF(q$^{n}$ ) is different with GF(2$^{n}$ ), when MVL is applied to finite field. If q is larger than 2, inverse should be considered. Optimized irreducible polynomial can reduce number of operation. In this paper we describe a method for choosing optimized irreducible polynomial and modularizing recursive polynomial operation. A optimized irreducible polynomial is provided which perform modulo reduction with low complexity. As a result, multiplier for fields GF(q$^{n}$ ) with low gate counts. and low delays are constructed. The architectures are highly modular and thus well suited for VLSI implementation.

This paper propose the method to derive RM(Reed-Muller) expansion coefficients for Multiple-Valued function. The general method to obtain RM expansion coefficient for p valued n variable is derivation of single variable transform matrix and expand it n times using Kronecker product. The transform matrix used is p$^{n}$ $\times$ p$^{n}$ matrix. In this case the size of matrix increases depending on the augmentation of variables and the operation is complicated. Thus, to solving the problem, we propose derivation of RM expansion coefficients using p$\times$p transform matrix and Karnaugh-map.

A new interface circuit for variable resistive sensors is proposed. The interface circuit compose of only two strain gages, a voltage-to-current converter, and current mirror with two outputs. A new dual slope A/D converter based on linear operational transconductance amplifier for the testing of prototype interface circuit is also described. The theory of operation is presented and experimental results are used to verify the theoretical predictions. The results show close agreement between predicted behaviour and experimental performance.

In this research we designed and synthesized an effective Synchronous DRAM controller for Interleaved Column Mode Access with VHDL. When target device was ALTERA CPLD MA$\times$712 105 logic cells were used. The result of the simulation at 66MHz clock operation, the clock-to-output time t$_{co}$ was 4.5㎱ and the SDRAM controller was in good working order.r. good working order.

Depending upon the existence of the battery, transponder is divided into active and passive transponder. The passive transponder operates without battery and so has no limitation in its operating range and life time. But it needs the RF-DC conversion circuit. In this paper, the analysis and design of the RF-DC conversion circuit in passive transponder operated in high frequency is presented and is confirmed by simulation and experiment.

The space variant imaging system which mimics the human beings visual system has some merits such as wide field-of-view, the low computational cost and the high accuracy in matching of correspondence points of stereo images. In this presentation, a visual servoing system based on the space variant imaging technique is proposed for the control of the rehabilitation robot arm. The position information of an object obtained by space variant imaging techniques is used for the visual servoing. According to the empirical data, the degree of correlation extracted by the space variant imaging technique is more accurate than that of the space invariant imaging technique.

In this paper we propose an FDI(fault detection and isolation) algorithm to detect and isolate single faults in linear systems. When a change in the system occurs the errors between the system output and the estimated output cross a threshold, and once a fault in the system is detected, the FCFM statistically isolates the fault by using the error between each neural network based fault model output and the system output.

For providing good quality power steadily, it is required that operators manipulate the control system of power plant with the good knowledge of power plant system and the control strategies, and cope with accidents effectively. With those requirements, it is general to train operators in power plant control room using full-scope simulator. A full scope simulator adopts the I&C instruments in the main cotrol room, so has to include I/O interface system to interface the simulation computer with I&C instruments in main control room. In already developed simulators, most of I/O interface systems are closed. vendor-dependent. proprietary systems. so have the many disadvantages in terms of cost and maintenance. In this paper. we suggest the method to configure I/O interface system for Thermal Power Plant Simulator based on standard technology which gives the advantages of ease-of-use. cost effectiveness, and simplicity of maintenanceuse by using off-the-shelf products for system integration.

In this paper, a fuzzy logic controller is designed for speed control of a hydraulic inverter elevator. Mathematical modeling of an elevator actuated with hydraulic system is presented and the friction characteristics of a cylinder is examined, which may cause the abrupt increase of the acceleration in the zero-crossing speed region. Simulation results show that the proposed fuzzy logic speed controller yields a better control performance than conventional PID controller.

In this note, we propose two methods of adaptive sliding mode control(SMC) schemes in which fuzzy systems(FS) are utilized to approximate the unknown system functions. In the first method, a FS is utilized to approximate the unknown function f of the nonlinear system $\chi$$^{(n)}$$\chi$＝f(equation omitted), t)＋b(equation omitted), t)u and the robust adaptive law is proposed to reduce the approximation errors between the true nonlinear function and fuzzy approximator, FS. In the second method, two FSs are utilized to approximate f and b, respectively. The robust control law is also designed. The stabilities of proposed control schemes are proved.

In recent years, many studies have been conducted on fuzzy control since it can surpass the conventional control in several respects. In this paper, numerical stability analysis methodology for the singleton-type linguistic fuzzy control systems is proposed. The Proposed stability analysis is not the analytical method but the numerical method using the convex optimization technique of Quadratic Programming (QP) and Linear Matrix Inequalities (LMI).

Since the inception of fuzzy control, lots of methods to design fuzzy controller have been reported, However, it is admitted that these methods are tailored to special problems and cannot be used in general control situation. Therefore this paper proposes auromatic generation algorithm of fuzzy control system and develops an automatic fuzzy controller generator. For that purpose, the genetic algorithm is used and it searches for the optimal parameters to design the fuzzy controller

In this paper, we propose an inference method for understanding intention of obstacle for collision avoidance using the grid-type map. In order to represent the environment using ultrasonic sensors, the grid-type map is first constructed. Then we detect the obstacle and infer the intention for collision avoidance using the CLA(Centroid of Largest Area) point of the grid-type map. To verify the proposed method, some experiments are performed.

An intelligent path planning algorithm for an autonomous cleaning robot is presented. This algorithm recognizes obstacle on the architectural CAD draft and generates subgoals as tracking points which executes the area filling task based on heuristic approach. A sweeping path is planned by sequentially connecting the tracking points in such a way that (1) the connected line segments should be crossed, (2) the total tracking points should be as short as possible, (3) the tracking line should not pass through the obstacle. Feasibility of the developed techniques has been demonstrated on real architectural CAD draft.

In this paper, a chattering alleviation ISM speed controller for the sinusoidal type BIDC motor is designed. Dead Zone function is proposed to change the chattering occurring in the transient state form high frequency to low frequency and time-varying gains are applied for the control input to eliminate the steady state excessive chattering in the conventional ISM. The proposed Dead Zone function represents the sliding layer composed of two switching surfaces and if a state vector exists in this layer, the chattering don’t occur. Simulation and experimental results confirm the useful effects of the above algorithm.

The pendulum is a SIMO(Single-input multi-output) system that both angle of pendulum and position of cart controlled simultaneously by one actuator. In this paper, propose a hybrid neuro-controller to apply to pendulum system. We design the conventional optimal controller and the neural network as a identifier, which can identify the uncertainty of plant not modeled, respectively. Then we combine them into a novel controller, with a structure that the error between plant and identifier is added in conventional optimal control input Finally, the paper shows the validity of the proposed controller through computer simulations and experiments.

In this paper is Proposed a VSC(variable structure controller) for a high-speed and high-precision position control of a XY Table, which is based on the PI type reaching mode. Also the comparative study between the proposed method and the conventional PID controller is presented as well. Designed and tuned under repeated experiments, the proposed method showed a better reasonable performance than PID controller in the aspect of tracking error.

In distributed arithmetic-based architecture for an inner product between two length-N vectors, the size of the ROM increases exponentially with N. Moreover, the ROMs are generally the bottleneck of speed, especially when their sire is large. In this paper, a ROM size reduction technique for DA (Distributed Arithmetic) is proposed. The proposed method is based on modified OBC (Offset Binary Coding) and control circuit reduction technique. By simulations, it is shown that the use of the proposed technique can result in reduction in the number of gates up to 50%.

A Viterbi Decoder for IMT2000 Mobile Station based on cdma200 is implemented in this paper. There are fundamental traffic channel, supplemental traffic channel for user data transmission and dedicated control channel for signal transmission in cdma2000. This decoder can decode these channels simultaneously, and support l/2, l/3, 1/4 code rate decoding. In case of fundamental channel decoding, it needs about 1100 logic cells and 30000 bit memory block.

In this paper, We propose design and implementation method of Modulator for IMT-2000 over reverse link. Parameters necessary for each block use those specified in cdma2000, i.e. standard for third generation cellular mobile communication which is proposed in currently North America. As software tool for modulator design, We implemented using MAX＋PLUS II that ALTERA support. Our System is totally composed of eight block and make it possible to transmit four channels(PICH, FCH, SCH, DCCH) simultaneously. Also the system is designed to make it possible to transmit data up to maximum 384kbps.

In this paper, the communication performance and its characteristics of the polar Low Earth Orbit(LEO) mobile satellite have been described in terms of the generalized performance parameters via geometric modeling and analysis. Especially, the general formula related to the parameters such as the number of orbits(M) and the number of satellites per orbit(N) were derived in the LEO satellite system for voice service, and then we applied the general result to IRIDIUM system(M＝6, N＝11) that would be scheduled to commercialize soon. The offered traffic of Inter Satellite Link(ISL), ISL link blocking probability as well as both new call blocking probability and the probability of forced termination for the on going call are calculated as the result of performance analysis.

In this paper, we design and verify the hardware circuit that performs PLCP(Physical Layer Convergence Protocol) protocol functions of physical layer in IEEE 802.11 frequency hopping WLAN(Wireless Local Area Network). Altera MAX＋PLUS I $I^{〔1〕}$ is used as a design tool. The designed circuit consists of control register module to interface with upper layer, FIFO module to transmit/receive data with upper layer, TX function module, and RX function module. It is verified that the developed circuit conforms well to the IEEE 802.11 standard specification and can support both 1Mbps and 2 Mbps transmission rate by simulation. The developed circuits can be utilized for the implementation of protocol processor in wireless LAN areas.

VDSL noises should be used for testing and evaluation of VDSL systems. In DMT systems for ADSL, noises are generated using IIR filters obtained from the Yule-Walker equations. However, this method cannot be directly applied to VDSL environments. In this paper, an DCT-based VDSL noise generation algorithm is proposed.

인터넷 자원 예약 프로토콜을 구현하고 있는 현재 RSVP(ISI re14.2a4)코드는 QoS를 지원하는 트래픽 제어부(큐 구조)와의 연결을 위해 LLDAL(Link-Layer-Dependent Adaptation Layer) 구조를 가지고 있다 트래픽 제어부와 통신을 하기 위해서 여러 호출들이 구현되어 있지만 실제 이러한 호출들을 사용해서 트래픽 제어를 하지는 않는다. 이러한 문제를 해결하기 위하여 수락 제어부와 트래픽 제어부를 구현하여 FreeBSD 상에서 일반화된 RSVP 라우터를 구현하였다.

In this paper, the performance of DS/CDMA receiver is analyzed, which employs a cascaded interference canceller using a soft detection. The channels considered is characterized by the multipath fading which is one of the factors for the performance degradation in mobile communication systems. The idea behind the cancellation is that the co-channel interference can be regenerated at the receiver and is subtracted from the received signal. The numerical results show the improvement of BER can be obtained by the proposed cancellation scheme.

In this paper, for the performance evaluation of the discrete wavelet multitone based VDSL modem we have studied VDSL system test loops(VDSL0 - VDSL7) that are proposed by ANSI T1E1.4. In addition, we have modeled the damage factors of the transmission channel and evaluated the data transmission performance of VDSL transmultiplexer based on DWMT in conjunction with the VDSL test loops. For each M-PAM signaling we have evaluated the SNRs that satisfy BER 〓 10$^{-7}$ through simulation and measured the maximum possible transmission speed on each VDSL test loop.

It is made possible a removal of the preamble for carrier recovery and symbol-timing recovery by storing a burst in memory with low overhead QPSK demodulation and this demodulation method also effects frame efficiency improved by processed synchronization performance. In this paper, we have proposed that new algorithm for arc-tangent look-up table which transform the input I, Q data by phase. This I, Q data plays an important role in demodulation and makes demodulator with low-overhead by storing a burst in memory. To evaluate proposed new algorithm and symbol-timing recovery method, function simulation and timing verification have been done by using synopsys VHDL tool.

We designed and fabricated microstrip line fed QMSAs(Quarter-Wavelength Microstrip Antenna) for 850〔MHz〕 band on the CGP-500 Copper-clad Laminates substrate (CHUKOH company) with $\varepsilon$$_{r}$＝2.6, H＝1.6〔mm〕( $\pm$0.08), where the width of the radiation patch is identical with that of the ground plane. The resonant frequencies and the return losses were measured by reducing the PSW(Partially Shorted Width) to 0〔mm〕, step by step, when the microstrip line width was 1.47〔mm〕, 2.93〔mm〕and 4.4〔mm〕separately. As a result, a good characterized antenna with a 11% reduced resonant length and a return loss -29.44〔㏈〕 was obtained when the total PSW was in the range of 70% of radiated patch width, compared to the conventional QMSA.A.

In this paper, indoor propagation characteristics are analyzed for various environments such as corridors, walls and corners. In order to present the statistical model for indoor environments the loss factors of each case are obtained by linear regression analysis method with the function of logarithmic distance between transmitter and receiver.

As integrated circuits are developed, the crosstalk and the pulse distortion have been major problems in the design. In this paper. the PML and one-point resistive source are applied. This paper deal with the microstripline circuit which has the gap and three microstripline. Obtaining the Propagation pulse shape in microstripline, we prove that the use of the FDTD in the microstripline is valid.

A variable gain amplifier(VGA) for wireless LAN is designed using active feedback. The amplifier is controlled by the gate voltage in the feedback path. This amplifier has more than 30㏈ gain variation and a improved linearity in the RF receiver block as input voltage increases. An active feedback topology is used by P-HEMT and is also analyzed for FET equivalent model.

A rigorous formulation is suggested〔l,2,3〕 in solving the scattering of plane waves by a dielectric wedge. Correcting surface currents are expanded in a Neumann series of fractional orders to meet the edge condition of static limit〔4〕. For the better converging series, the modified Neumann series satisfying the static limit edge condition and the radiation condition are suggested here for the surface currents having two different wave numbers of air and dielectric〔4〕. This representation gives accurate solutions over the whole region including the grazing incidence of the plane waves upon the dielectric wedge of large permittivities.

In this paper, resonant frequency, electromagnetic field distribution, and resonant mode of a microstrip substrate-mounted dielectric resonator are investigated. A dielectric resonator is excited by the microstrip line. The data are obtained using the finite difference time-domain (FDTD) and compared with the experimental results and theoretical solutions the previous published paper.

Radiation characteristics of axial elementary current source on the cylindrical bianisotropic substrateloaded with bianisotropic superstrate layer are presented. The effects of bianisotropic superstrate cover on the radiation problems of a microstrip antenna are studied. This investigation is performed by using the Green function formulation in the spectral domain. Numerical results for the radiation pattern of the bianisotropic superstrate-loaded microstrip antenna is analyzed.

According to increasing the integration of the device, there are important consideration about the improvement of the reliability in the product. To improve the reliability of the device, the test parameters and test time are increased. There are no pin-to-pin short test and pin-to-pin leakage test in the present test items to analysis the characteristics and reliability of the device. The purpose of the paper is to model the pin-to-pin phenomenon and propose to modify the test method present and to test the new pin-to-pin DC parameters. These modified and additive test items are applied to product test and confirmed to improve the reliability of product test.

Recently, small signal modeling of CMOS device becomes more difficult because the design rule goes into deep submicron. De-embedding of substrate parameters is important in order to use CMOS devices at RF frequencies. In this paper, we suggest a new de-embedding model with refined physical meaning and accuracy. In GaAs IC’s, the substrate is almost an insulator but Si substrate has the semiconducting characteristics. It offers some troubles if it is treated like GaAs substrate. The conducting substrate is modeled with five resistances, which leads to very accurate modeling so long as the pad layout is symmetrical. Frequency range is up to 39㎓ and fitting accuracy is as small as 0.00037 on least square errors.

본 논문에서는 다수 반송자에 의해 일어나는 산란현상을 고려한 반송자-반송자 산란(CCS) 이동도 모델을 구현하였다. 구현된 CCS 이동도 모델을 검증하기 위해 N/sup ＋/P 접합 다이오드에 대해 모의실험 한 후 MEDICI와 비교한 결과 장벽전위인 0.9〔V〕 미만과 이상에서 각각 2%와 6% 정도의 상대오차를 보였다. BJT의 콜렉터에 30〔V〕를 인가한 후 베이스 전압을 0.8〔V〕까지 증가시켜 모의실험 한 결과 베이스 전압베이스 전류 및 베이스 전압-컬렉터 전류 특성은 각각 4.41%, 6.10%의 최대 상대오차를 보였다.

고 농도의 반송자가 존재하는 영역에서의 지배적인 산란 효과인 억셉터 및 도너 산란과 반송자-반송자 산란, Screening 효과를 수치적으로 구현하는 방법을 제안한다. 또한 높은 바이어스가 인가된 경우 Slotboom 변수를 사용함으로써 발생하는 부동 소숫점 한계를 극복하기 위한 척도변환 방법을 제안한다. 구현된 모델의 정확성을 검증하기 위해서 자체 개발된 소자 시뮬레이터인 BANDIS를 이용하여, 척도변환에 대해서 n-MOSFET 소자로 17〔V〕이상에서도 모의실험이 가능함을 보였고, 전력 BJT 소자에 대해서 Philips Unified 이동도 모델의 모의 실험 결과, 상업용 2차원 소자 시뮬레이터인 MEDICI에 비해 척도변환은 최대 12%, Philips Unified 이동도는 최대 2.8%이내의 상대오차를 보였다

본 논문에서는 고 농도로 불순물이 주입된 영역에서 전자 및 정공 농도를 정교하게 구현하기 위해 Fermi-Dirac 분포함수를 고려한 포아송 방정식의 이산화 방법을 제안하였다. Fermi-Dirac 분포를 근사시키기 위해서 Least-Squares 및 점근선 근사법을 사용하였으며 Galerkin 방법을 근간으로 한 유한 요소법을 이용하여 포아송 방정식을 이산화하였다. 구현한 모델을 검증하기 위해 전력 BJT 시료를 제작하여 자체 개발된 소자 시뮬레이터인 BANDIS를 이용하여 모의 실험을 수행한 결과, 상업용 2차원 소자 시뮬레이터인 MEDICI에 비해 최대 4%이내의 상대 오차를 보였다.

Shallow Trench Isolation (STI) has become the most promising isolation scheme for ULSI applications. The stress of STI structure is one of several factors to degrade characteristics of a device. The stress contours or STI structure vary with the trench depth. Isolation characteristics of STI was analyzed as the depth of trench varied. And transistor characteristics was compared. Isolation punch-through voltage for n$^{＋}$ to pwell and p$^{＋}$ to nwell increased as trench depth increased. n$^{＋}$ to pwell leakage current had nothing to do with trench depth but n$^{＋}$ to pwell leakage current decreased as trench depth increased. In the case of transistor characteristics, short channel effect was independent on trench depth and inverse narrow width effect was greater for deeper trenches. Therefore in order to achieve stable device, it is important to minimize stress by optimizing trench depth.

The paper describes a 17 $\times$ 17-b multiplier using the Radix-4 Booth’s algorithm. which is suitable for 32-bit RISC/DSP microprocessors. To minimize design area and achieve improved speed, a 2-stage pipeline structure is adopted to achieve high clock frequency. Each part of circuit is modeled and optimized at the transistor level, verification of functionality and timing is performed using HSPICE simulations. After modeling and validating the circuit at transistor level, we lay it out in a 0.35 ${\mu}{\textrm}{m}$ 1-poly 4-metal CMOS technology and perform LVS test to compare the layout with the schematic. The simulation results show that maximum frequency is 330MHz under worst operating conditions at 55$^{\circ}C$ , 3V, The post simulation after layout results shows 187MHz under worst case conditions. It contains 9, 115 transistors and the area of layout is 0.72mm by 0.97mm.

The breakdown voltage in fully depleted SOI N-MOSFET’s have been studied over a wide range of film thicknesses, channel doping, and channel lengths. An asynmmetric Source/Drain SOI technology is proposed, which having the advantages of Normal LDD SOI(Silicon-On-Insulator) for breakdown voltage and gives a high drivability of LDD SOI without sacrificings hot carrier immunity The two-dimensional simulations have been used to investigate the breakdown behavior in these device. It is found that the breakdown voltage(BVds) is almost same with high current drivability as that in Normal LDD SOI device structure.

The Silylation photo-resist etch process was tested by Enhanced-ICP dry etcher. The comparison of the two process results of micro pattern etching with 0.25${\mu}{\textrm}{m}$ CD by E-ICP and ICP reveals that E-ICP has better quality than ICP The etch rate and the microloading effect was improved in E-ICP Especially, the problem of the lateral etch was improved in E-ICP.

In this paper, we have studied the role of sources gases, SiH$_4$, NH$_3$ and $N_2$, to produce Si-N and Si-H bond in PECVD. The correlations of a deposition rate, a refractive index and a permitivity were investigated with the NH$_3$ flow rate of 6, 9 and 12 sccm, and SiH$_4$ flow rate of 20, 30 and 40 sccm, and substrate temperature of 150, 250 and 35$0^{\circ}C$. But the $N_2$ flow rate and chamber pressure were fixed at 55 sccm and 700mTorr. And then MIM capacitors were fabricated and tested for MMIC applications.

본 논문에서는 넓은 동작 영역을 갖는 composite 트랜지스터를 설계하였다. 제안된 composite 트랜지스터는 p-형 차동쌍(p-type differential pair)을 이용하여 문턱전압이 음(-)의 값을 갖도록 설계하였고, 수학적인 해석을 통해 증명하였다. 음의 문턱전압으로 동작 영 역을 향상되었고 SPICE 시뮬레이션을 이용하여 제안된 composite 트랜지스터가 기존의 composite 트랜지스터보다 넓은 동작 영역을 가짐을 보였다. 제안된 composite 트랜지스터는 0.6㎛ CMOS n-well 공정 파라미터를 이용하여 3V에서 시뮬레이션 하였다.

MMIC 제작을 위한 단일 반도체 공정으로써 PECVD를 이용한 Si₃N₄의 증착, RIE를 이용한 CaAs via-hole건식식각, 그리고 airbridge 공정조건을 위한 실험 및 분석 작업을 수행하였다. Si₃N₄의 증착 실험에서는 굴절률이 2인 조건을, GaAs via-hole 식각 실험에서는 최적화된 thru-via의 모양과 식각률을 갖는 조건을, airbridge 실험에서는 polyimide coating 및 건식 식각 조건과 금 도금 및 습식 식각의 최적 조건들을 찾아내었다.

In this paper, we designed a pipeline (15,9) Reed-solomon decoder. To compute the error locator polynomials, we used the Euclidean algorithm. This algorithm includes computation of inverse element. We avoided the inverse element calculation in this RS decoder by using ROMs. We designed this decoder using VHDL. Simulation results show that the designed decoder corrects three error symbols. We implemented this design through an Altera FPGA chip.

In this work, we proposed Proper etching algorithm for ultra-large scale integrated circuit device and simulated etching process using the proposed algorithm in the case of ICP (inductive coupled plasma) 〔1〕source. Until now, many algorithms for etching process simulation have been proposed such as Cell remove algorithm, String algorithm and Ray algorithm. These algorithms have several drawbacks due to analytic function; these algorithms are not appropriate for sub 0.1 ${\mu}{\textrm}{m}$ device technologies which should deal with each ion. These algorithms could not present exactly straggle and interaction between Projectile ions and could not consider reflection effects due to interactions among next projectile ions, reflected ions and sputtering ions, simultaneously In order to apply ULSI process simulation, algorithm considering above mentioned interactions at the same time is needed. Proposed algorithm calculates interactions both in plasma source region and in target material region, and uses BCA (binary collision approximation4〕method when ion impact on target material surface. Proposed algorithm considers the interaction between source ions in sheath region (from Quartz region to substrate region). After the collision between target and ion, reflected ion collides next projectile ion or sputtered atoms. In ICP etching, because the main mechanism is sputtering, both SiO$_2$ and Si can be etched. Therefore, to obtain etching profiles, mask thickness and mask composition must be considered. Since we consider both SiO$_2$ etching and Si etching, it is possible to predict the thickness of SiO$_2$ for etching of ULSI.

In this research we have developed a reliable, effective and feasible HEI(High-Energy Ion Implantation) process 3D-simulation tool, and then by using it we can predict and analyze the effect of HEI process on characteristics of the standard CMOS device. high-energy ion implantation above 200 keV is inevitable process to form retrograde well and buried layer to prevent leakage current, to conduct field implant for field isolation, and to perform after-gate implantation. The feasible analysis tool is a product of the HEI process modeling verified by comparison of the SIMS experiments with the simulation results. Especially, in this paper, we present the predicting capability of HEI-induced impurity and damage profiles compared with the published SIMS data in order to acquire the reliability of our results ranging from few keV to several MeV for phosphorus and boron implantation.

Spin tunneling giant magnetoresistance effect was studied to utilize in the application of random access memory. Ferromagnetic/Insulator/Ferromagnetic films were sputtered on glass substrates and perpendicular current was applied. Measurements of magneto- resistance of the junction showed 8.6% of MR ratio. Voltage output depends on the magnetization directions of the write line and read line, thus enabling the system to be used as a random access memory

We have synthesized carbon nanotubes by thermal chemical vapor deposition of $C_2$H$_2$ on transition metal-coated silicon substrates. Carbon nanotubes are uniformly synthesized on a large area of the plain Si substrates, different from previously reported porous Si substrates. It is observed that surface modification of transition metals deposited on substrates by either etching with dipping in a HF solution and/or NH$_3$ pretreatment is a crucial step for the nanotube growth prior to the reaction of $C_2$H$_2$gas. We will demonstrate that the diameters of carbon naotubes can be controlled by applying the different transition metals.

A new image encoding and identification scheme is proposed for security verification by using CGH(computer generated hologram), random phase mask, and correlation technique. The encrypted image, which is attached to the security product, is made by multiplying QPH(quadratic phase hologram) using SA(simulated annealing) algorithm with a random phase function. The random phase function plays a role of key when the encrypted image is decrypted. The encrypted image could be optically recovered by 2-f system and automatically verified for personal identification. Simulation results show the proposed method cand be used for the reconstruction and the recognition of the encrypted. Image.

We designed and fabricated a travelingwave CPW(coplanar waveguide) electrode for LiNbO$_3$ optical modulator. To Investigate the variation of microwave refractive index of these electrodes, we prepared the CPW electrode samples as a function of electrode thickness and measured the TDR and S-parameter. From this results, we could know the electrode conditions of index matching to 2.20 for 1550nm optical wave index for applying LiNbO$_3$ optical modulator and described. Also, we discussed the some properties of CPW electrode for applying LiNbO$_3$ optical modulator.

Using modal transmission-line theory (MTLT), we evaluate the power coupling of optical directional coupler composed by two parallel guiding slabs. The numerical results reveal that maximum power transfer occurs at a novel wavelength λ$_{opt}$, in which the excitation ratio of supermodes at input boundary is equal to each other, and it is generally different from minimum gap λ$_{min}$.in/.

When the size of the device is decreased, the hot carrier degradation presents a severe problem for long-term device reliability. In this paper we fabricated & tested the 0.26${\mu}{\textrm}{m}$ NMOSFET with wet gate oxide and nitride oxide gate to compare that the characteristics of hot carrier effect, charge to breakdown, transistor Id_Vg curve and charge trapping using the Hp4145 device tester As a result we find that the characteristics of nitride oxide gate device better than wet gate oxide device, especially a hot carrier lifetime(nitride oxide gate device satisfied 30years, but the lifetime of wet gate oxide was only 0.1year), variation of Vg, charge to breakdown and charge trapping etc.

In this paper, we have proposed the hardware architecture which implements the algorithm for retaining the connectivity which prevents disconnecting in the gray-scale image thinning To perform the image thinning in a real time which find a skeleton in image, it is necessary to examine the connectivity of the skeleton in a real time. The proposed architecture finds the connectivity number in the 4-clock period. The architecture is consists of three blocks, PS(Parallel to Serial) Converter and State Generator and Ridge Checker. The PS Converter changes the 3$\times$3 gray level image to four sets of image pixels. The State Generator examine the connectivity of the central pixel by searching the data from the PS Converter. the 3$\times$3 gray level image determines. The Ridge Checker determines whether the central pixel is on the skeleton or not The proposed architecture finds the connectivity of the central pixel in a 3$\times$3 gray level image in the 4-clocks. The total circuits are verified by the design tools and operate correctly.

In this paper, an improved integer-N frequency synthesizer that can be synthesized into smaller channel space than input signal frequency is presented. The proposed frequency synthesizer also has an characteristics of fast phase locking time. The frequency synthesizer performed in the manner that it divides various outputs of different phases in VCO by means of dividers that have different control signals respectively and then add the divided signal. In order to confirm the characteristics of proposed frequency synthesizer, behavioral and SPICE simulations are performed using C-language and HSPICE respectively.

An efficient technique to trade off speed for resolution is the sigma-delta modulation (SDM). This paper proposes a new SDM architecture to improve conversion rates and SNR(Signal-to Noise Ratio) by using master clock and four divided clock. The charateristics of the proposed SDM are simulated in MATLAB environment. and optimizing the capacitor sizes is done by iterative processing. other analog characteristics are simulated using 0.65${\mu}{\textrm}{m}$ n-well CMOS process, double poly and single metal. The result of simulation shows that more increasing the effective bits of internal ADC/DAC, bigger the improvement of SNR.

An 12bit current-mode folding and interpolation analog to digital converter (ADC) with multiplied folding amplifiers is proposed in this paper. A current - mode multiplied folding amplifier is employed not only to reduced the number of reference current source, but also to decrease a power dissipation within the ADC. The designed ADC fabricated by a 0.6${\mu}{\textrm}{m}$ n-well CMOS double metal/single poly process. The simulation result shows the power dissipation of 280㎽ with a power supply of 5V.

A mobile agent is a program which is capable of migrating autonomously from host to host in the heterogeneous network, to perform some computation on behalf of the user. Mobile agents have many advantages in the distributed computing environment. But they are likely to suffer many attacks on the security due to the mobility. In order to make use of a mobile agent in the real applications, the security issues must be addressed. We deal with the problem which is concerned with protecting a mobile agent in transit and detecting a mobile agent clone. In this paper we propose a trust center based secure mobile agent transfer protocol. This protocol transfers a mobile agent securely from host to host and detects a mobile agent clone. We further show the security of the protocol against many attacks.

Conventional rule-based approaches have some problems caused by rule maintenance. Also they have some limitations to get the high quality translation results. This paper presents new English-Korean transfer approach that uses patterns and examples on limited domains. The use of patterns and examples can resolve the ambiguities and give high quality of MT Proposed approach can be applied in various NLP related area. Experimental results with a test corpus are discussed.

We study on machine learning method for automatic document categorization using back propagation algorithm. Four categories are classified for the experiment and the system learns with 20 documents per a category by this method. As a result of the machine learning, we can find that a new document is automatically classified with a category according to the predefined ones.

This paper presents a method for procedure-based on-line program replacement for user applications. To deal with the size change in the procedure to replace, the method uses the unmapped area of process address space for mapping a new version of procedure. The method is effective in that and it does not cause large performance loss during the replacement or require any additional software layer for the replacement. The method is illustrated in the SUN Solaris environment.

An analytical performance model that can predict the performance of a superscalar processor employing multiple branch prediction is introduced. The model is based on the conditional independence probability and the basic block size of instructions, with the degree of multiple branch prediction, the fetch rate, and the window size of a superscalar architecture. Trace driven simulation is performed for the subset of SPEC integer benchmarks, and the measured IPCs are compared with the results derived from the model. As the result, our analytic model could predict the performance of the superscalar processor using multiple branch prediction within 6.6 percent on the average.

Simple Genetic Algorithm(SGA) proposed by J. H. Holland is a population-based optimization method based on the principle of the Darwinian natural selection. The theoretical foundations of GA are the Schema Theorem and the Building Block Hypothesis. Although GA does well in many applications as an optimization method, still it does not guarantee the convergence to a global optimum in GA-hard problems and deceptive problems. Therefore as an alternative scheme, there is a growing interest in a co-evolutionary system, where two populations constantly interact and co-evolve. In this paper we propose an extended schema theorem associated with a schema co-evolutionary algorithm(SCEA), which explains why the co-evolutionary algorithm works better than SGA. The experimental results show that the SCEA works well in optimization problems including deceptive functions.

Recently, a new learning algorithm for multilayer neural networks has been proposed 〔1〕. In the new learning algorithm, each output neuron is considered as a function of weights and the weights are adjusted so that the output neurons produce desired outputs. And the adjustment is accomplished by taking gradients. However, the gradient computation was performed numerically, resulting in a long computation time. In this paper, we derive the all necessary equations so that the gradient computation is performed analytically, resulting in a much faster learning time comparable to the backpropagation. Since the weight adjustments are accomplished by summing the gradients of the output neurons, we will call the new learning algorithm “multi-gradient.” Experiments show that the multi-gradient consistently outperforms the backpropagation.

In this paper, we propose a modified feedback neural network structure for adaptive control of robot manipulators. The proposed structure is that all of network output feedback into hidden units and output units. Learning algorithm is standard back-propagation algorithm. The simulation showed the effectiveness of using the new neural network structure in the adaptive control of robot manipulators.

After detecting the edge which is applying the morphological operators to the hybrid FCNN, we could analyze and compare. The hybrid FCNN is completely removed to the noise in the image, and worked in order to obtain the result image which is closest to the original image. Also, the morphological operator is applied to the image as the method in order to detect more good the edge than the conventional edge. FCNN which is the pipeline type is completely suitable to detecting the image processing as well as the hardware size. In this paper. we would make the structure elements of the morphological operator the variable template and the static template, and compare with the edge enhancement of two images. After being the result which is applying the variable template morphological operator and the static template morphological operator to the image, we could know that the edge images applying the variable template is superior in a edge enhancement side.

Muscle based face image synthesis is one of the most realistic approach to realize life-like agent in computer. Facial muscle model is composed of facial tissue elements and muscles. In this model, forces are calculated effecting facial tissue element by contraction of each muscle strength, so the combination of each muscle parameter decide a specific facial expression. Now each muscle parameter is decided on trial and error procedure comparing the sample photograph and generated image using our Muscle-Editor to generate a specific face image. In this paper, we propose the strategy of automatic estimation of facial muscle parameters from 2D marker movement using neural network. This also 3D motion estimation from 2D point or flow information in captered image under restriction of physics based face model.

This paper proposes an efficient fault diagnosis for digital circuits using multilayer neural networks. The efficient learning algorithm is also proposed for the multilayer neural network, which is combined the steepest descent for high-speed optimization and the dynamic tunneling for global optimization. The fault-diagnosis system using the multilayer neural network of the proposed algorithm has been applied to the parity generator circuit. The simulation results shows that the proposed system is higher convergence speed and rate, in comparision with system using the backpropagation algorithm based on the gradient descent.

This paper investigates a RBF(Radial Basis Function) equalizer for channel equalization. RBF network has an identical structure to the optimal Bayesian symbol-decision equalizer solution. Therefore RBF can be employed to implement the Bayesian equalizer. Proposed algorithm of this paper makes channel states estimation to be unncessary, also makes center number which is needed indivisual channel to be minimum. Bayesian Equalizer has the theorical optimum performance. Proposed Equalizer performance is compared with this Baysian equalizer performance.

In This paper, we investigated the single step prediction for output responses of chaotic system with multi Input multi output using chaotic neural networks. Since the systems with chaotic characteristics are coupled between internal parameters, the chaotic neural networks is very suitable for output response prediction of chaotic system. To evaluate the performance of the proposed neural network predictor, we adopt for Lorenz attractor with chaotic responses and compare the results with recurrent neural networks. The results demonstrated superior performance on convergence and computation time than the predictor using recurrent neural networks. And we could also see good predictive capability of chaotic neural network predictor.

In this paper, we calculate the moving velocity of viewer by using two eye images obtained at different time through the camera. This process is necessary for future 3D display technique, in which moving viewer can see 3D image continuously We firstly extract two eyes image and calculate the pixel coordinate of center point between two eyes. Next, we calculate the moving velocity in two dimension by comparing two center point coordinates obtained at different time.

We present a use. interface(UI) simulator for developing a mobile phone. This simulator consists of 3 major modules: Graphic Tool Editor, User Interface Software(UI), and Network Command Processor(NCP). The Graphic Tool Editor can design a virtual mobile terminal. The NCP sends a command to the phone and then receives its status from the phone after completion of the command. We can add or modify lots of features easily to the phone using the UI module. These modules can interact each other by sharing the common area in the memory. By doing so, these modules can exchange their status and data to operate in real-time. We have designed and tested a virtual prototyping phone for the LGP 3200 manufactured by LGIC by using the simulator. Through a series of experiment, we have believed that our virtual prototyping interactive simulator can do shorten its development and testing cycle by applying it in the early design phase.

In this paper we propose a facial feature extraction method by using a genetic algorithm. The method uses a facial feature template to model the location of eyes and a mouth, and genetic algorithm is employed to find the optimal solution from the fitness function consisting of invariant moments. The simulation results show that the proposed algorithm can effectively extract facial features from face images with variations in position, size, rotation and expression.

Recently, X-ray chest radiograph is showing a tendency to take an image of digital radiograph so as to diagnose the pathological pattern of chest in a usual. When the radiologist observes the chest image derived from digital radiograph system on the monitor. he feels difficult to find out because of the sensitivity of chest radiograph. It takes amount of time to adjust the proper image for diagnosis. Therefore, we provided the result and the method of the optimal image equalization for image enhancement.

The delay of cardiac depolarization wave detection in the conventional pacemakers or AICD (automatic implantable cardioverter/ defibrillator, or ICD) has been overlooked. However, it is known that the delay may cause hemodynamic problems and may prevent the proper operation of a new automatic feature, automatic capture verification, that is to be appeared in the near-future devices. In order to reduce the effects of the delay, a delay prevention algorithm was developed and tested by applying three human electrograms. The algorithm set the sensing threshold just above the measured noise level to reduce the detection delay. It is found that the low threshold was able to reduce the delay by 20msec(average) In most cases. The implementation results showed reliability and efficacy of the algorithm, and the algorithm could be applicable to the existing hardware and software of the conventional pacemakers and AICD without any significant modifications.

본 논문에서는 수평식 입체영상카메라의 주시각 자동제어를 위한 고속, 고정밀 시차추출 알고리즘을 제안한다. 제안된 알고리듬은 수평식 입체영상 카메라의 초점과 주시각의 선형적 관계에 따라 사람의 눈에서와 같은 자연스럽고도 선명한 입체영상을 획득할 수 있도록 주시각 및 초점제어를 동시에 자동 제어하며, 입체영상에 포함되어 있는 평면 및 상하 불일치 영역을 최소화하기 위한 전처리 과정과 고속, 고정밀 시차추출을 위한 프로젝션 및 켑스트럼(Cepstrum) 필터링 과정이 포함되어 있다. 제안된 알고리듬은 수평식 입체카메라의 실시간 제어를 가능하게 하며 카메라 조작자의 초점 및 주시각 제어에 대한 부담을 줄여 준다.

In this paper, we present a multi-watermarking method for a copyright protection and confidentiality for an original digital image. One watermark is used for a copyright protection and another for a copyright protection and another for a confidentiality and a detection of unauthorized copies.

In this paper, we propose a hybrid watermarking algorithm for MPEG bitstream. Hybrid watermarking technique uses Spread Spectrum technique for I-frame and Motion Vector technique for P, B-frame. Thus, it enables all MPEG frame to be watermarked. By applying above technique, it is possible not only to protect intellectual property right but also to be robust to all kinds of attacks. And this scheme requires partial decoding of MPEG bitstream, so it can be applied to real time watermarking applications.

This paper presents a denoising algorithm that can suppress additive noise components while preserving signal components in the wavelet domain. The algorithm uses the local statistics of wavelet coefficients to attenuate noise components adaptively. Then threshohding operation is followed to reject the residuary noise components in the wavelet coefficients. Simulations are carried out over 1-D signals corrupted by Gaussian noise and the experimental results show the effectiveness of the proposed algorithm.

중수로(CANDU) 형 월성 원자력발전소의 칼란드리아 압력관 전면부를 감시점검하기 위한 열영상 관측시스템을 설계/제작하였다. 중수로는 가동중에 핵연료를 교체한다. 칼란드리아 전면부에는 380 개의 압력관 채널이 위치하고 있다. 핵연료를 교체할 시에 핵연료 교체장비가 칼란드리아 압력관 채널의 ENDCAP을 열고 핵연료를 장전하는 과정에서 발생할 지도 모르는 중수누출, 핵연료교체장비의 이상상태를 점검하는데 목적이 있다. 열영상카메라는 상용 CCD 카메라에 비해 영상의 해상도가 떨어진다. CCD 카메라는 수증기 누출과 같은 육안검사에 활용하고, 열영상카메라는 압력관 채널의 온도변화 등을 점검하기 위해 CCD/열영상카메라의 융합구조로 설계/제작하였다.

중수로(CANDU) 형 월성 원자력발전소의 칼란드리아 압력관 전면부를 감시점검하기 위한 열영상 관측프로그램을 개발하였다. 국내의 사용자들의 요구에 부응할 수 있는 다양한 기능을 부가 하였다. 부가된 기능에는 임의의 포인트, 영역, 라인, 경계선을 마우스로 지정하여, 선택된 지점, 영역, 라인 및 경계선의 특징을 추출할 수 있는 기능을 갖추고 있다. 또한 KAERI Thermo Inspector 의 기능을 살린 일반영상/열영상의 매핑기능을 부가하였다. 일반영상에 비해 상대적으로 해상도가 떨어지는 열영상대신에 CCD 영상의 관측포인트를 지정하면 열영상카메라좌표계의 매핑된 지점의 이상상태를 판정할 수 있는 특성을 갖는다.

In this paper, we propose new algorithms to construct video object planes(VOP’s) for MPEG-4. VOP’s allow the new video standard MPEG-4 to enable content-based funtionalities. A comprehensive review summarizes some of the most important VOP’s generation techniques that have been proposed. The proposed algorithm use segmentation technique as labeling and motion estimation as three-step search algorithm(TSS). It is improved by a labeling technique that distinguishes background and object from a frame.

We have developed a speaker dependent voice command system(VCS) to control the sunroof in the car using RSC-164 VRP(Voice Recognition Processor). VCS consists of control circuits, microphone, speaker and user switch box. The control circuits include RSC-164, input audio preamplifier, memory devices, and relay circuit for sunroof control. It is designed robustly in various car noisy situations like audio volume, air conditioner, and incoming noise when window or sunroof opened. Each two users can control the car sunroof using seven voice commands on the Super TVS model and five voice commands on the Onyx model. It works well when we drive the car at over 100 km/h with the sunroof opened.

This paper presents a real-time MPEG-2 AAC decoding system, which can decode 2-channel main profile MPEG-2 AAC bitstream. The proposed system supports all decoding tools except for coupling channel tool, and provides sampling rates of 32, 44.1, 48 KHz. The system consists of a simple programmable DSP core and two hardwired logic modules that perform Huffman decoding and prediction for real-time implementation.

Telegram is an indispensible information & telecommunication system to our daily life. VTS(Voice Telegram System) under intensive research is intended to enhance exchanging capability of information & telecommunication by adding voice media to existing telegram system. Overall configuration and necessary core technologies of the system were investigated for its development. Among those many technologies in need, the technology of compressing and recording data is most critical to the development of cheap hardware. This is so called vocoder algorithm and is the core technology of voice information system. So, here, vocoder algorithm now being studied will be introduced.

In speech signal processing, the accurate decision of the voiced/unvoiced sound is important for robust word recognition and analysis and a high coding efficiency. In this paper, we propose the mehod of the voiced/unvoiced decision using the LSP parameter which represents the spectrum characteristics of the speech signal. The voiced sound has many more LSP parameters in low frequency region. To the contrary, the unvoiced sound has many more LSP parameters in high frequency region. That is, the LSP parameter distribution of the voiced sound is different to that of the unvoiced sound. Also, the voiced sound has the minimun value of sequantial intervals of the LSP parameters in low frequency region. The unvoiced sound has it in high frequency region. we decide the voiced/unvoiced sound by using this charateristics. We used the proposed method to some continuous speech and then achieved good performance.

For mobile robot, the navigation effectiveness can be improved by providing autonomy, but this autonomy requires the mobile robot to detect unknown obstacles and avoid collisions while moving it toward the target. This paper presents an effective method for autonomous navigation of the mobile robot in structured environments. This method uses ultrasonic sensor array to detect obstacles and utilizes force relationship between the obstacles and the target for avoiding collisions. Accuracy of sensory data produced by ultrasonic sensors is improved by employing error eliminating rapid ultrasonic firing (EERUF) technique. Navigation algorithm controlling both the velocity and steering simultaneously is developed, implemented to the mobile robot and tested on the floor filled with the cluttered obstacles. It is verified that from the results of the field tests the mobile robot can move at a maximum speed of 0.66 m/sec without any collisions.

In this paper, we design the H$\infty$ optimal controller satisfying robust stability and performance in spite of the plant uncertainty for an electro-mechanical actuator system and analyze the controller in frequency domain. H$\infty$ optimal controller K was designed using iteration algorithm suggested by DOYLE. Using the controller in an electro-mechanical actuator system, the joint with very small coupling rigidity coefficient was used to vary the control parameter. The plant unstructured uncertainty was assumed to be a multiplicative type.

Linear motor is able to produce line movement without rotary-to-line converter at the system required line moving. Thus Linear motor has no gear, screw, belt for line movement. Therefore it has some advantage which decrease friction loss, noise, vibration, maintenance effort and prevent decay of control performance due to backlash. This paper proposes the estimation method of unknown parameters from the BLDC Linear motor and determine the PI controller gain through this estimation. Each control movement that is current, speed, position control, and PWM wave generation is performed on Processor, which is DSP(Digital Signal Processor), having high speed performance. PI theory is adopted to each for controller for control behavior More fast convergence to command position is accomplished by applying the new velocity locus which derived from position error.

This paper presents a speed controller for the Sinusoidal type BLDC motor using the sliding mode. Since the sliding mode control has some practical limitations such as the chattering phenomenon and reaching phase problems, the technique of overcoming these limitations is proposed in a practical realization. This proposed speed control technique is composed of an smooth integral variable structure control(IVSC), and chattering prediction method.

This paper deals with the design and implementation of an Ethernet-based communication protocol to be used in PC-based I/O interface systems. Recently, the performance of PC systems is being highly improved and Ethernet is used as the stable communication network over the world. We develop a new protocol driver with the capability of accessing Ethernet directly using NDIS(Network Driver Interface Specification), the network interface standard of Windows O.S. in PC, and install it at the application layer of the protocol structure. Its major roles are the supplement of CSMA/CD algorithm, the effective use of the long data frame of Ethernet, and the real-time transmission of data frames. This paper represents the possibility of the real-time control network and systems based on PCs and Ethernet.

A magnetic levitation control system is inherently nonlinear and very unstable. Thus there should be a stabilizing compensator network and a negative feedback path using noncontact photoresistor or ultrasonic sensors for the levitation operation. Since the photo sensor plays a key role in the system, the steady-state error and transient performance of the overall system depend on the characteristics of the sensors. But the sensor itself also suffers from nonlinearity, and the magnitude of sensor input heavily depends on environmental conditions. To improve the output performance, we added a linearizing circuit for the sensor characteristics and a disturbance cancelation circuit to avoid sensitive output due to extraneous interfering light.

In this thesis, we research about Communication System Construction and Test-Bed Realization Method and Software’s Design with written program into Embedded Micro Controller’s restricted memory region using a DSP Chip to deal with mainly high speed communication. Tools used for modern communication network control use TI or AMD general chip class, but nevertheless responsibility for the point at issue, Analog Device is architecture design model moderated for small communication system. In this thesis, we present extended model, and realize basic case.

GPIB-based measurement applications are common in every field of multi-instrument environment. Also personal computers and workstations play a key role in measurement ability to create cost-effective instrument control solutions. For simple data acquisition systems which are automated by GPIB interface, standard GPIB controllers add a little burden to the budget for DAQ. In this paper, we provide software and hardware construction methods for cost-effective custom-made GPIB controller boards both for controllers and instruments. This way of tailored configuration to suit a particular application of GPIB-based instrument control solution pays dividends in cost and flexibility for data processing management.

본 논문은 다중마스터 시스템의 버스 공유를 큐잉이론으로 모델링하여 정량화하고 이를 바탕으로 최적화 된 실시간 시스템을 설계하는 방법을 제안하였으며 그 결과를 실측 실험을 통해서 검증하였다. 다중마스터 모드와 슬레이브 모드를 지원하는 마스터를 이용한 다중 마스터 시스템에서 버스의 공유로 인한 지연과 각 작업의 대기 시간은 각각에 대한 모델링을 통해 정량화 할 수 있으며 이를 통하여 최적화된 시스템을 구성할 수 있게 된다. 본 논문의 실험에서는 VMEbus 상에서 3개의 마스터와 그에 종속된 4개의 슬레이브 시스템을 구성하여 각 마스터들의 버스 요구율과 서비스 시간에 따라 버스를 점유하기 위해 기다리는 시간을 정량적으로 분석하였으며 이를 통하여 개선된 시스템은 각 작업의 버스 상에서의 대기 시간을 최소화하고 효과적으로 버스를 공유하므로써 작업 시간 오차와 오류 발생을 최소화 할 수 있음을 보였다.

A gain controllable precision full-wave rectifier for the measurements of small-signal voltage is presented. It consists of gain controllable inverter superdiode and noninverter superdiode. The results of simulation with PSpice and experiment on breadboard show that the proposed rectifier has the characteristic of precise rectification and amplification for small signal voltage.