트렌치 깊이에 따른 트랜지스터와 소자분리 특성

Characteristics of Transistors and Isolation as Trench Depth

Shallow Trench Isolation (STI) has become the most promising isolation scheme for ULSI applications. The stress of STI structure is one of several factors to degrade characteristics of a device. The stress contours or STI structure vary with the trench depth. Isolation characteristics of STI was analyzed as the depth of trench varied. And transistor characteristics was compared. Isolation punch-through voltage for n$^{＋}$ to pwell and p$^{＋}$ to nwell increased as trench depth increased. n$^{＋}$ to pwell leakage current had nothing to do with trench depth but n$^{＋}$ to pwell leakage current decreased as trench depth increased. In the case of transistor characteristics, short channel effect was independent on trench depth and inverse narrow width effect was greater for deeper trenches. Therefore in order to achieve stable device, it is important to minimize stress by optimizing trench depth.