A Proposal on Fast Pull-in PLL with Clock Count Type Frequency Detector

  • 발행 : 2000.07.01

초록

In this paper, we proposed a PLL with the clock count type frequency detector, in which the very fast pull-in time can be realized by resetting the VCO at the rising of input signal after charging the capacitor of loop filter with the voltage corresponding to the frequency of the input signal.

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