Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design and Implementation of the Tree-like Multiplier

  • Song, Gi-Yong (Dept. of computer Engineering, Chungbuk National University) ;
  • Lee, Jae-jin (Dept. of computer Engineering, Chungbuk National University) ;
  • Lee, Ho-Jun (Dept. of computer Engineering, Chungbuk National University) ;
  • Song, Ho-Jeong (Dept. of computer Engineering, Chungbuk National University)
  • Published : 2000.07.01
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Abstract

This paper proposes a 16-bit ${\times}$ 16-bit multiplier for 2 twos-complement binary numbers with tree-like structure and implements it on a FPGA. The space and time complexity analysis shows that the 16-bit Tree-like multiplier represents lower circuit complexity and computes more quickly than both Booth array multiplier md Modified array multiplier.

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