Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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The Measurement of the Wall Charge on the Three Electrodes in the Addressing Period of ac PDP

AC PDP의 addressing 시 3전극 상에서의 벽전하량 계측

  • Lee, Ki-Bum (Dept. Electrical Engineering Pusan National University) ;
  • Kim, Dong-Hyun (Dept. Electrical Engineering Pusan National University) ;
  • Kang, Dong-Sik (Dept. Electrical Engineering Pusan National University) ;
  • Park, Cha-Soo (Dept. Electrical Engineering Pusan National University) ;
  • Cho, Chung-Soo (Dept. Electrical Engineering Pusan National University) ;
  • Park, Chung-Hoo (Dept. Electrical Engineering Pusan National University)
  • Published : 2000.05.13
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Abstract

The relationships between driving voltage and the wall charge distribution in the address period of surface discharge type AC Plasma Display Panel have been investigated. The quantity of wall charge on each electrode are detected simultaneously from the electrode current after applying only one addressing discharge pulse. The wall charge Qy on the scan electrode Y is nearly the sum of Qx on the address electrode X and Qz on the sustain electrode Z. The Qy increased with the driving voltage regardless of the kind of electrode, whereas the address time Td decreased, Qz and Qy are increased considerably with the blocking voltage Vz, whereas Qx is decreased. The increase rate of Qx, Qy and Qz for increase in Vz was $-13{\times}10^{-2}$ (pc/Vz), and $60{\times}10^{-2}$ (pc/Vz) and $70{\times}10^{-2}$(pc/Vz), respectively.

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