Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2002.07c
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- Pages.1724-1727
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- 2002
Flexible Partitioning of CDFGs for Compact Asynchronous Controllers
- Sretasereekul, Nattha (The University of Tokyo) ;
- Okuyama, Yuichi (The University of Aizu) ;
- Saito, Hiroshi (The University of Tokyo) ;
- Imai, Masashi (The University of Tokyo) ;
- Kuroda, Kenichi (The University of Aizu) ;
- Nanya, Takashi (The University of Tokyo)
- Published : 2002.07.01
Abstract
Asynchronous circuits have the potential to solve the problems related to parameter variations such as gate delays in deep sub-micron technologies. However, current CAD tools for large-scale asyn-chronous circuits partition specification irrelevantly, because these tools cannot control the granularity of circuit decomposition. In this paper we propose a hierarchical Control/Data Flow Graph (CDFG) containing nodes that are flexibly partitioned or merged into other nodes. We show a partitioning algorithm for such CDFGs to generate handleable Signal Transition Graphs (STGs) for asynchronous synthesis tools. The algorithm a1lows designers to assign the maximum number of signals of partitioned nodes considering of timality. From an experiment, this algorithm can flexibly partition and result in more compact asynchronous controllers.
Keywords