한국정보디스플레이학회:학술대회논문집
- 2002.08a
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- Pages.519-522
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- 2002
Impact of Plasma Induced Degradation on Low Temperature Poly-Si CMOS TFTs during Etching Process
- Chang, Jiun-Jye (Electronics Research and Service Organization /Industrial Technology Research Institute) ;
- Chen, Chih-Chiang (Electronics Research and Service Organization /Industrial Technology Research Institute) ;
- Chuang, Ching-Sang (Electronics Research and Service Organization /Industrial Technology Research Institute) ;
- Yeh, Yung-Hui (Electronics Research and Service Organization /Industrial Technology Research Institute)
- Published : 2002.08.21
Abstract
In this paper, we analyze the impact of plasma etching process induced device degradation on low temperature poly-Si TFTs. The results indicate the relationship between device degradation and PPID effect during plasma fabrication. The dual-gate structure, which is used to suppress leakage current, is also discussed in this research.
Keywords