Electrical characteristics of the SOI RESURF LDMOSFET with step doped epi-layer

Step doping 농도를 가지는 SOI RESURF LDMOSFET의 전기적 특성 분석

  • Kim, Hyoung-Woo (Korea Electrotechnology Research Institute, Power Semiconductor Group) ;
  • Seo, Kil-Soo (Korea Electrotechnology Research Institute, Power Semiconductor Group) ;
  • Kim, Ji-Hong (Korea Electrotechnology Research Institute, Power Semiconductor Group) ;
  • Kim, Nam-Kyun (Korea Electrotechnology Research Institute, Power Semiconductor Group)
  • 김형우 (한국전기연구원 전력반도체연구그룹) ;
  • 서길수 (한국전기연구원 전력반도체연구그룹) ;
  • 김지홍 (한국전기연구원 전력반도체연구그룹) ;
  • 김남균 (한국전기연구원 전력반도체연구그룹)
  • Published : 2004.07.05

Abstract

Surface doped SOI RESURF LDMOSFET with recessed source region is proposed to improve the on- and off-state characteristics. Surface region of the proposed LDMOS structure is doped like step. The characteristics of the proposed LDMOS is verified by two-dimensional process simulator ATHENA and device simulator ATLAS[1]. The numerically calculated on-resistance($R_{ON}$) of the proposed LDMOS is $10.36\Omega-cm$ and breakdown voltage is 205V when $L_{dr}=7{\mu}m$ with step doped surface.

Keywords