The ATM SAR Processor Optimized for VoDSL Service

VoDSL 서비스에 최적화된 ATM SAR 프로세서

  • Published : 2003.10.01

Abstract

In this paper, we propose an ATM processor suitable for VoDSL subscriber's equipments. The processor is composed of ATM block, AAL protocol block and ATS scheduler, and provides up to 4 VCC which service data and voice traffics on the ATM network. The proposed ATS scheduler can guarantee QoS of the voice traffic and supports multiple AAL2 packet. The ATM processor is manufactured on the 0.35 micron fabrication line of HYNIX semiconductor and provides the maximum data transfer rate of up to 52 Mbps. We implement the LAD, which is the VoDSL subscriber's equipment. The experimental results on the test bed network shows that the proposed hardware scheme successfully services most of the applications of the VoDSL services.

본 논문은 VoDSL(Voice over DSL) 가입자용 단말기에 적합한 ATM(Asynchronous Transfer Mode) 프로세서를 제안한다. 제안된 ATM 프로세서는 ATM 단, ATM 적응단의 프로토콜을 처리하는 블록. ATS 스케줄러 등으로 구성되며, ATM 네트워크상에 음성과 데이터 서비스를 위한 4개의 VCC (Virtual Channel Connection)을 지원한다. ATS(Adaptive Time Slot) 스케줄러는 음성 트래픽의 QoS (Quality of Service)를 보장하며 다중 AAL2 패킷을 지원하도록 설계하였다. 제안된 ATM 프로세서는 하이닉스 반도체의 0.35마이크론 공정에서 제작되었으며, 최대 52Mbps의 속도를 지원한다. 본 ATM 프로세서가 탑재된 VoDSL 가입자 장비인 LAD(Integrate Access Device)를 실제 제작하여 테스트용 네트워크 상에서 실험한 통하여 제안된 ATM 프로세서의 하드웨어 구조가 VoDSL 서비스의 대부분의 응용 분야에 성공적으로 적용 될 수 있음을 확인한다.

Keywords

References

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