대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

고압 중수소 열처리 효과에 의해 조사된 수소 결합 관련 박막 게이트 산화막의 열화

Hydrogen-Related Gate Oxide Degradation Investigated by High-Pressure Deuterium Annealing

  • 이재성 (위덕대학교 정보통신공학부)
  • 발행 : 2004.11.01
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

두께가 약 3 nm 인 게이트 산화막을 갖는 P 및 NMOSFET를 제조하여 높은 압력 (5 atm.)의 중수소 및 수소 분위기에서 후속 열처리를 각각 행하여 중수소 효과(동위원소 효과)를 관찰하였다. 소자에 대한 스트레스는 -2.5V ≤ V/sub g/ ≤-4.0V 범위에서 100℃의 온도를 유지하며 진행되었다. 낮은 스트레스 전압에서는 실리콘 계면에 존재하는 정공에 의하여 게이트 산화막의 열화가 진행되었다. 그러나 스트레스 전압을 증가시킴으로써 높은 에너지를 갖는 전자에 의한 계면 결함 생성이 열화의 직접적인 원인이 됨을 알 수 있었다. 본 실험조건에서는 실리콘 계면에서 phonon 산란이 많이 발생하여 impact ionization에 의한 "hot" 정공의 생성은 무시할 수 있었다. 중수소 열처리를 행함으로써 수소 열처리에 비해 소자의 파라미터 변화가 적었으며, 게이트 산화막의 누설전류도 억제됨이 확인되었다. 이러한 결과로부터 impact ionization이 발생되지 않을 정도의 낮은 스트레스 전압동안 발생하는 게이트 산화막내 결함 생성은 수소 결합과 직접적인 관계가 있음을 확인하였다.

Experimental results are presented for the degradation of 3 nm-thick gate oxide under -2.5V $\leq$ V$_{g}$ $\leq$-4.0V stress and 10$0^{\circ}C$ conditions using P and NMOSFETs that are annealed with hydrogen or deuterium gas at high-pressure (5 atm). The degradation mechanisms are highly dependent on stress conditions. For low gate voltage, hole-trapping is found to dominate the reliability of gate oxide both in P and NMOSFETs. With increasing gate voltage to V$_{g}$ =-4.0V, the degradation becomes dominated by electron-trapping in NMOSFETs, however, the generation rate of "hot" hole was very low, because most of tunneling electrons experienced the phonon scattering before impact ionization at the Si interface. Statistical parameter variations as well as the gate leakage current depend on and are improved by high-pressure deuterium annealing, compared to corresponding hydrogen annealing. We therefore suggest that deuterium is effective in suppressing the generation of traps within the gate oxide. Our results therefore prove that hydrogen related processes are at the origin of the investigated oxide degradation.gradation.

키워드

참고문헌

  1. E. Rosenbaum and J. Wu, 'Trap generation and breakdown processes in very thin gate oxides', Microelectronics Reliability, vol. 41, pp.625-632, 2001 https://doi.org/10.1016/S0026-2714(01)00026-9
  2. H. Guan, M. F. Li, Y. He, B. J. Cho, and Z. Dong, 'A thorough study of quasi-breakdown phenome -non of thin gate oxide in dual-gate CMO SFET's', IEEE Trans. Electron Devices, vol. 47, pp. 1608-1616, Aug.2000 https://doi.org/10.1109/16.853038
  3. S. I. Takagi and M. Takayanagi, 'Carrier transport properties of thin gate oxides after soft and hard breakdown', Microelectronic Engineering, vol. 59, pp. 5-15, 2001 https://doi.org/10.1016/S0167-9317(01)00624-4
  4. M. H. Lee, C. H, Lin, and C. W. Liu, 'Novel methods to incorporate deuterium in the MOS structures,' IEEE Electron Device Lett, vol. 22, pp.519-521, Nov. 2001 https://doi.org/10.1109/55.962649
  5. K. Hess, I. C. Kizilyalli, and J. W. Lyding, 'Giant isotope effect in hot electron degradation of metal oxide silicon devices,' IEEE Trans. Electron Devices, vol. 45, pp. 406-416, Feb. 1998 https://doi.org/10.1109/16.658674
  6. Z. Chen, K. Hess, J. Lee, J. W. Lyding, E. Rosenbaum, I. Kizilyalli, S. Chetlur, and R.Huang, 'On the mechanism for interface trap creation in MOS transistors due to channel hot carrier stressing,' IEEE Electron Device Lett. vol. 21, pp. 24-26, Jan. 2000 https://doi.org/10.1109/55.817441
  7. J. Wu, E. Rosenbaum, B. MacDonald, E. Li, B. Tracy, and P. Fang, 'Anode hole injection versus hydrogen release: The mechanism for gate oxide breakdown,' IEEE Int Reliability Physics Symp., San Jose, CA, 2000, pp. 27-32 https://doi.org/10.1109/RELPHY.2000.843887
  8. K. F. Schuegraf and C. Hu, 'Hole injection $SiO_2$ breakdown model for very low voltage lifetime extrapolation,' IEEE Trans. Electron Devices, vol. 41, no. 5, pp. 761-766, 1994 https://doi.org/10.1109/16.285029
  9. D. J. DiMaria and E. Cartier, 'Mechanism for stress-induced leakage currents in thin silicon dioxide films,' J Appl. Phys., vol. 78, pp. 3883-3894, 1995 https://doi.org/10.1063/1.359905
  10. Y. Mitani, H. Satake, H. Itoh, and A. Toriumi, 'Suppression of stress-induced leakagecurrent after Fowler-Nordheim stressing by deuterium pyrogenic oxidation and deuterium poly-Si deposition,' IEEE Trans. Electron Devices, vol. 49, pp. 1192-1197, Jul. 2002 https://doi.org/10.1109/TED.2002.1013275
  11. T. Yamamoto, and K. Uwasawa, and T. Mogami, 'Bias temperatre instability in scaled $p^+$ polysilicon gate p-MOSFETs,' IEEE Trans. Electron Devices, vol. 46, pp. 921-926, May. 1999 https://doi.org/10.1109/16.760398
  12. H. Uchida, S. Inomata, and T. Ajioka, 'Effect of interface traps and bulk traps in $SiO_2$ on hot-carrier-induced degradation,' IEEE Int. Corference on Microelectronics Test Structures, 1989, pp. 103-108 https://doi.org/10.1109/ICMTS.1989.39292
  13. S. Tsujikawa, Y. Akamatsu, H. Umeda, and J. Yugami, 'Two concerns about NBTI issue: gate dielectric scaling and increasing gate current,' IEEE Int. Reliability Physics Symp., Phoenix, AZ, 2004, pp. 28-34
  14. K. Hess, Theory of semiconductor devices, New York : IEEE Press, 2000. ch.8 and ch.13