Korean Journal of Materials Research (한국재료학회지)

Materials Research Society of Korea (한국재료학회)
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Eliminating Voids in Direct Bonded Si/Si3N4‖SiO2/Si Wafer Pairs Using a Fast Linear Annealing

직접접합 실리콘/실리콘질화막//실리콘산화막/실리콘 기판쌍의 선형가열에 의한 보이드 결함 제거

  • 정영순 (서울시립대학교 신소재공학과) ;
  • 송오성 (서울시립대학교 신소재공학과) ;
  • 김득중 (서울시립대학교 신소재공학과) ;
  • 주영철 (순천향대학교 기계공학과)
  • Published : 2004.05.01
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Abstract

The void evolution in direct bonding process of $Si/Si_3$$N_4$ ∥ $SiO_2$/Si silicon wafer pairs has been investigated with an infrared camera. The voids that formed in the premating process grew in the conventional furnace annealing process at a temperature of $600^{\circ}C$. The voids are never shrunken even with the additional annealing process at the higher temperatures. We observed that the voids became smaller and disappeared with sequential scanning by our newly proposed fast linear annealing(FLA). FLA irradiates the focused line-shape halogen light on the surface while wafer moves from one edge to the other. We also propose the void shrinking mechanism in FLA with the finite differential method (FDM). Our results imply that we may eliminate the voids and enhance the yield for the direct bonding of wafer pairs by employing FLA.

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