KIEE International Transactions on Electrophysics and Applications

대한전기학회 (The Korean Institute of Electrical Engineers)
권호 표지

Separation and Quantification of Parasitic Resistance in Nano-scale Silicon MOSFET

  • Lee Jun-Ha (Dept. of Computer System Engineering, Sangmyung University) ;
  • Lee Hoong-Joo (Dept. of Computer System Engineering, Sangmyung University) ;
  • Song Young-Jin (Information&Computer Science Major, Konyang University) ;
  • Yoon Young-Sik (Mechanical Engineering Major, Konyang University)
  • 발행 : 2005.04.01
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초록

The current drive in a MOSFET is limited by the intrinsic channel resistance. All other parasitic elements in a device structure perform significant functions leading to degradation in the device performance. These other resistances must be less than 10$\%$-20$\%$ of the channel resistance. To meet the necessary requirements, the methodology of separation and quantification of those resistances should be investigated. In this paper, we developed an extraction method for the resistances using calibrated TCAD simulation. The resistance of the extension region is also partially determined by the formation of a surface accumulation region that gathers below the gate in the tail region of the extension profile. This resistance is strongly affected by the abruptness of the extension profile because the steeper the profile is, the shorter this accumulation region will be.

키워드

참고문헌

  1. C. J. Kang, D. Jeon, and Y. Kuk, 'Channel length effect in a MOSFET structure by scanning capacitance mieroscopuy,' Surface Scince, vol. 544, iss. 1, pp. 87-92,Oct. 2003 https://doi.org/10.1016/j.susc.2003.08.017
  2. R. J. Luyken, T. Schulz, J. Hartwich, L. Dreeskornfeld, M. Stadele, and W. Rosner, 'Design Considerations for Fully Depleted SOI Transistors in the 25-50 nmregime,' Solid-State Electronics, vol. 47, no. 7, pp. 1199-1204, July 2003 https://doi.org/10.1016/S0038-1101(03)00038-8
  3. Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices. Cambridge, MA: Cambridge Univ. Press, pp. 30-45, 1998
  4. Y. Taur, 'MOSFET channel length extraction and interpretation,' IEEE Trans. Electron Devices, vol. 47, pp. 160-170, Jan. 2000 https://doi.org/10.1109/16.817582
  5. S. D. Kim, C. M. Park, and J. Woo, 'Advanced Model and Analysis for Series Resistance in Sub-100nm CMOS including Poly-depletion and overlap doping gradient effect,' in Proc. IEDM '00, pp. 723-726, 2000
  6. K. K. Ng and W. T. Lynch, 'Analysis of the gatevoltage-dependent series resistance of MOSFETs,' IEEE Trans. Electron Devices, vol. 33, pp. 965-972, July 1986 https://doi.org/10.1109/T-ED.1986.22602
  7. M. Y. Kwong, C. H. Choi, R. Kasnavi, P. Griffin, and R. Dutton, 'Series Resistance Calculation for Source/Drain Extension Regions Using 2-D Device Simulation,' IEEE Trans. Electron Devices, vol. 49, no. 7, July 2002
  8. P. Degond and A. Ayyadi. 'A Coupled Schrodinger Drift-Diffusion Model for Quantum Semiconductor Device Simulations,' Journal of Computational Physics, vol. 181, pp. 222-228, 2002 https://doi.org/10.1006/jcph.2002.7122
  9. J. H. Lee, K. D. Lee, K. H. Lee, T. K. Kim, Y. K. Park, and J. T. Kong, 'Systematic Global Calibration of a Process Simulator,' in Proc. MSM2000, 2000, pp. 121-125
  10. A. Magna, P. Alippi, L. Colombo, and M. Strobel, 'Atomic scale computer aided design for novel semiconductor devices,' Computational Materials Science, vol. 27, iss. 1, pp. 10-15, Mar. 2003 https://doi.org/10.1016/S0927-0256(02)00418-4
  11. J. O. Borland, 'Low Temperature Shallow Junction Formation for 70nm Technology Node and Beyond,' in Proc. Mat. Res. Soc. Symp, pp. 1-8, 2002
  12. International Technology Roadmap for Semiconductors, SEMATECH, Austin, TX, 2001
  13. B. S. Kim, H. U. Jeong and H. W. Lee, 'Effects of Tungsten Size and Nickel Addition in DC acr Resistance of Cu-W Electrode,' KIEE Int. Trans. On EA, Vol.4-C, No.2, pp. 68-72, 2003
  14. C.M. Osburn and K.R. Bellur, 'Low parasitic resistance contacts for scaled ULSI devices,' Thin Solid Films, vol. 332, pp. 428-436, 1998 https://doi.org/10.1016/S0040-6090(98)01046-3
  15. T. H. Gil, H. S. Kim and Y. S. Kim, 'Characteristics of Ni/SiC Schottky Diodes Grown by ICP-CVD,'KIEE Int. Trans. On EA, Vol.4-C, No.3, pp. 111-116, 2004
  16. Y. M. Kim, I. S. Yu and J. H. Lee, 'Fabrication and Characterization of Silicon Probe Tip for Vertical Probe Card Using MEMS Technology,' KIEE Int. Trans. On EA, Vol.4-C, No.4, pp. 149-154, 2004
  17. S. H. Woo and H. S. Lee, 'Characteristics of Electron Beam Extraction in Large Area Electron Beam Generator,' KIEE Int. Trans. On EA, Vol.4-C, No.1, pp. 10-14, 2004