Design of a Pipelined Binary Arithmetic Encoder for H.264/AVC

H.264/AVC를 위한 파이프라인 이진 산술 부호화기 설계

  • Yun, Jae-Bok ;
  • Park, Tae-Geun (Dept. of Information, Communication, and Electronics Engineering, The Catholic University of Korea)
  • 윤재복 (㈜에이디파워) ;
  • 박태근 (가톨릭대학교 정보통신전자공학부)
  • Published : 2007.06.25

Abstract

CABAC(Context-based Adaptive Binary Arithmetic Coding) among various entropy coding schemes which are used to improve compression efficiency in H.264/AVC has a high hardware complexity and the fast calculation is difficult because data dependancy exists in the bit-serial process. In this paper, the proposed architecture efficiently compose the renormalization process of binary arithmetic encoder which is an important part of CABAC used in H.264/AVC. At every clock cycle, the input symbol is encoded regardless of the iteration of the renormalization process for every input symbol. Also, the proposed architecture can deal with the bitsOutstanding up to 127 which is adopted to handle the carry generation problem and encode input symbol without stall. The proposed architecture with three-stage pipeline has been synthesized using the 0.18um Dongbu-Anam standard cell library and can be operated at 290MHz.

H.264/AVC에서 압축 효율을 향상시키기 위해 사용된 엔트로피 코딩(entropy coding)중에 CABAC(Context-based Adaptive Binary Arithmetic Coding)은 하드웨어 복잡도가 높고 비트 시리얼 과정에서 데이터 의존도(data dependancy)가 존재하기 때문에 빠른 연산이 어렵다. 본 논문에서는 H.264/AVC에 사용되는 CABAC의 핵심부분의 이진 산술 부호화기 (binary arithmetic encoder)의 정규화 과정을 효율적으로 구성하여 각 입력 심벌 정규화 과정의 반복횟수에 관계없이 매 클럭에 입력 심벌이 부호화 되도록 하였다. 또한 제한된 하드웨어로 인해 발생하는 캐리 발생 문제를 처리기 위해 채택된 bistOutstanding을 127까지 처리할 수 있으며 동시에 입력 심벌을 지연(stall) 없이 부호화 할 수 있다. 3단 파이프라인으로 구성된 구조는 동부 아남 $0.18{\mu}m$ 표준 셀 라이브러리를 사용하여 합성한 결과 최대 290MHz로 동작한다.

Keywords

References

  1. ITU-T Recommendation H.264: Advanced video coding, ITU, March 2004
  2. D. Marpe, H. Schwarz, and T. Wiegand, 'Context-Based Adaptive Binary Arithmetic Coding in the H.264/AVC Video Compression Standard,' IEEE Transaction on Circuits and Systems for Video Technology, vol. 13, no. 7, pp. 620-636, 2003
  3. W. B. Pennebaker, J. L. Mitchel, G. G. Langdon jr., and R. B. Arps., 'An overview of the basic principles of the Q-coder adaptive binary arithmetic coder,' IBM Jounal of Research and Development, 32(6):717-726, 1988 https://doi.org/10.1147/rd.326.0717
  4. D. Salomon, 'Data Compression,' Springer, 2004
  5. W. Di, G. Wen, H. Mingzeng and J. Zhenzhou, 'An Exp-Golomb Encoder and Decoder Architecture for JVT/AVS,' IEEE, pp. 910-913, 2003
  6. J. L. Nunez-Yanez and V. A. Chouliaras, 'Design and Implementation of a High-Performance and Silicon Efficient Arithmetic Coding Accelerator for the H.264 Advanced Video Codec,' Proceedings of the 16th International con-ference on Application-Specific Systems, Architecture and Processors(ASAP'05), pp. 411-416, 2005
  7. H. Shojania and S. Sudharsanan, 'A VLSI Architecture for High Performance CABAC Encoding,' Visual Communications and Image Processing, pp. 1444-1454, 2005
  8. Zhao Xing, Yang Ye, Qin Xing, Wu Tao, and Shen Hai-Bin, 'A Cycle-Efficient Sample -Parallel EBCOT Architecture for JPEG2000 Encoder,' Proceedings of 2004 International Symposium on intelligent Multimedia, Video and Speech Processing, pp. 386-389, 2004
  9. M. Tarui et al, 'High-Speed Implementation of JBIG Arithmetic Coder,' Proceedings of the IEEE Region 10 Conference, pp. 1291-1294, 1999
  10. M. Tarui et al, 'High-Speed Implementation of JBIG Arithmetic Coder,' Proceedings of the IEEE Region 10 Conference, pp. 1291-1294, 1999
  11. ITU, H.264/AVC Reference Software, http://iphome.hhi.de/suehring/tml, ver.JM 10.2