Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Design and Analysis of 16 V N-TYPE MOSFET Transistor for the Output Resistance Improvement at Low Gate Bias

16 V 급 NMOSFET 소자의 낮은 게이트 전압 영역에서 출력저항 개선에 대한 연구

  • 김영목 (고려대학교 전기공학과) ;
  • 이한신 (고려대학교 전기공학과) ;
  • 성만영 (고려대학교 전기공학과)
  • Published : 2008.02.01
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Abstract

In this paper we proposed a new source-drain structure for N-type MOSFET which can suppress the output resistance reduction of a device in saturation region due to soft break down leakage at high drain voltage when the gate is biased around relatively low voltage. When a device is generally used as a switch at high gate bias the current level is very important for the operation. but in electronic circuit like an amplifier we should mainly consider the output resistance for the stable voltage gain and the operation at low gate bias. Hence with T-SUPREM simulator we designed devices that operate at low gate bias and high gate bias respectively without a extra photo mask layer and ion-implantation steps. As a result the soft break down leakage due to impact ionization is reduced remarkably and the output resistance increases about 3 times in the device that operates at the low gate bias. Also it is expected that electronic circuit designers can easily design a circuit using the offered N-type MOSFET device with the better output resistance.

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References

  1. Matsuno S., 'Current LCD market and variables for the future', SID., p. 1, 1999
  2. Odawara K. and Kawakami H., 'Forwarding LCD technologies and industry', Electronic Manufacturing Technology Symposium, p. 23, 1995
  3. Kanatani Y. and Ayukawa M., 'LCD technology and its application', proc. 1995 4th International Conference of Solid-State and Integrated Circuit Technology, p. 712, 1995
  4. Behzad R., 'Design of Analog CMOS Integrated Circuit', Mcgraw-Hil, p. 124, 2000
  5. Chen C. and Dongpo C., 'A novel bias circuit design in low power LCD driver', Solid-State and Integrated Circuits Technology, Vol. 3, p. 2003, 2004 https://doi.org/10.1109/ICSICT.2004.1435233
  6. S. M. Sze and Kwok K. NG, 'Physics of Semiconductor Devices', Wiley-Interscience, p. 259, 2006
  7. S. Wolf, 'Silicon Processing for the VLSI era Volume 3', Lattice, p. 559, 1995
  8. S. Dimitrijev, 'Principle of semiconductor devices', Oxford, p. 414, 2006
  9. B. J. Baliga, 'Power Semiconductor Devices', PWS, p. 79, 1996
  10. S.-H. Kim, S.-H. Kim, J.-S. Kim, M. S. Kim, S.-I. Jo, Y.-M. Kim, E. S. Kim, S.-C. Lee, and M. Y. Sung, 'Advanced dual gate oxide process using CVD-gate oxide', The 11th Korean Conference on Semiconductor, p. 72, 2004