JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지
DOI QR코드

DOI QR Code

Full CMOS Single Supply PLC SoC ASIC with Integrated Analog Front-End

  • Nam, Chul (Dept. of Electronics Engineering, Konkuk University) ;
  • Pu, Young-Gun (Dept. of Electronics Engineering, Konkuk University) ;
  • Kim, Sang-Woo (Dept. of Electronics Engineering, Konkuk University) ;
  • Lee, Kang-Yoon (Dept. of Electronics Engineering, Konkuk University)
  • Published : 2009.06.30
Download PDF
⟨ Previous Next ⟩

Abstract

This paper presents a single supply PLC SoC ASIC with a built-in analog Front-end circuit. To achieve the low power consumption along with low cost, this PLC SoC employs fully CMOS Analog Front End (AFE) and several LDO regulators (LDOs) to provide the internal power for Logic Core, DAC and Input/output Pad driver. The receiver part of the AFE consists of Pre-amplifier, Gain Amplifier and 1 bit Comparator. The transmitter part of the AFE consists of 10 bit Digital Analog Converter and Line Driver. This SoC is implemented with 0.18 ${\mu}m$ 1 Poly 5 Metal CMOS Process. The single supply voltage is 3.3 V and the internal powers are provided using LDOs. The total power consumption is below 30 mA at stand-by mode to meet the Eco-Design requirement. The die size is 3.2 $\times$ 2.8 $mm^{2}$.

Keywords

References

  1. F.-N. Pavlidou, A.J. Han Vinck, J. Yazdni, and B. Honary, "Power Line Communications: State of the Art and Future Trends", IEEE Communications Magazine, pp.34-40, April 2003 https://doi.org/10.1109/MCOM.2003.1193972
  2. J. Bausch, T. Kistner, M. Babic, and K. Dostert, "Characteristics of Indoor Power line channels in the frequency Range 50-500 kHz" IEEE Proc. Power Line Communications and Its Applications, pp. 86-91, Oct. 2006 https://doi.org/10.1109/ISPLC.2006.247442
  3. http://www.planetsys.co.kr
  4. H. Farrokhi and R. J. Palmer, "The Designing of an Indoor Acoustic Ranging System Using the Audible Spread Spectrum LFM(CHIRP) Signal," Canadian Conf. of Electrical and Computer Engineering, pp. 2131-2134, May 2005 https://doi.org/10.1109/CCECE.2005.1557409
  5. http://www.ds2.es/products/chipset.aspx
  6. Y Kim, S.W. Lee, S.S Choi, M. Y Oh, and H.S Park, "Requirement of analog front end ASIC for power line communication modem of Korean industrial standards", ITC-CSS 2008, pp. 1417-1420
  7. ADCHIPS 32bit EISC Datasheet
  8. YoungGun Pu, and Kang-Yoon Lee, "A Design of Full CMOS single-Chip PHY IC for power line communication(PLC)Systems", ISOCC2006, pp. 83-86,Oct. 2006
  9. Behazad Razavi, "Design of Analog CMOS Integ-rated Circuits", McGraw-Hill International Edition, 291
  10. Chester Simpson, "Linear and Switching Voltage Regulator Fundamentals", National semiconductor
  11. The Energy using Products (EuP) Directive, Version 3 May 2008

Cited by

  1. Mixed-signal transmitter chip with digital bridge and analogue front-end for XDSL in home networks vol.1, pp.3, 2012, https://doi.org/10.1049/iet-net.2011.0054
  2. A 10-bit 1.8 V 45 mW 100 MHz CMOS transmitter chip for use in an XDSL modem in a home network vol.81, pp.2, 2014, https://doi.org/10.1007/s10470-014-0398-6