The Journal of Korean Institute of Electromagnetic Engineering and Science (한국전자파학회논문지)

The Korean Institute of Electromagnetic Engineering and Science (한국전자파학회)
권호 표지
DOI QR코드

DOI QR Code

A 18 GHz Divide-by-4 Injection-Locked Frequency Divider Based on a Ring Oscillator

링 발진기를 이용한 18 GHz 4분주 주입 동기 주파수 분주기

  • Seo, Seung-Woo (School of Electrical Engineering, Korea University) ;
  • Seo, Hyo-Gi (School of Electrical Engineering, Korea University) ;
  • Rieh, Jae-Sung (School of Electrical Engineering, Korea University)
  • 서승우 (고려대학교 전기전자전파공학부) ;
  • 서효기 (고려대학교 전기전자전파공학부) ;
  • 이재성 (고려대학교 전기전자전파공학부)
  • Published : 2010.05.31
Download PDF
⟨ Previous Next ⟩

Abstract

In this work, a 18 GHz divide-by-4 injection-locked frequency divider(ILFD) based on ring oscillator has been developed in $0.13-{\mu}m$ Si RFCMOS technology. The free-running oscillation frequency is from 4.98 to 5.22 GHz and output power is about －30 dBm, consuming 33.4 mW with a 1.5 V supply voltage. At 0 dBm input power, the locking range is 3.5 GHz(17.75~21.25 GHz) and with varactor tuning, the operating range is increased up to 5.25 GHz(16.0~21.25 GHz). The fabricated chip size is $0.76\;mm{\times}0.57\;mm$ including DC and RF pad.

본 논문에서는 18 GHz 대역에서 동작하는 링 발진기를 이용한 4분주 주입 동기 주파수 분주기(Injection-Locked Frequency Divider: ILFD)를 $0.13-{\mu}m$ Si RFCMOS 공정을 이용하여 설계, 제작한 결과를 보인다. 1.5 V의 공급 전압에 대하여 33.4 mW의 전력을 소비하며, 입력 신호가 없을 때 약 -30 dBm의 전력으로 4.98~5.22 GHz에서 자유발진하였다. 0 dBm의 입력 전력에 대하여 3.5 GHz(17.75~21.25 GHz)의 동기 범위를 가지며, 동작 범위는 바랙터 조절에 의해 5.25 GHz(16.0~21.25 GHz)까지 증가하였다. 제작된 칩의 크기는 DC와 RF 패드를 포함하여 $0.76\;mm{\times}0.57\;mm$이다.

Keywords

References

  1. J. Lee, "A 75-GHz PLL in 90-nm CMOS technology", Digest of Technical Papers in IEEE International Solid-State Circuits Conference, pp. 432-613, Feb. 2007. https://doi.org/10.1109/ISSCC.2007.373479
  2. C. Changhua, D. Yanping, and K. K. O, "A 50-GHz phase-locked loop in $0.13-{\mu}m$ CMOS", IEEE Journal of Solid-State Circuits, vol. 42, pp. 1649-1656, Aug. 2007. https://doi.org/10.1109/JSSC.2007.900289
  3. C. Chung-Chun, W. Chi-Hsueh, H. Bo-Jr, T. Hen-Wai, and W. Huei, "A 24-GHz divide-by-4 injection-locked frequency divider in $0.13-{\mu}m$ CMOS technology", ASSCC. IEEE, pp. 304-343, 2007. https://doi.org/10.1109/ASSCC.2007.4425700
  4. S. L. Jang, Y. H. Chuang, S. H. Lee, and J. J. Chao, "Circuit techniques for CMOS divide-by-four frequency divider", Microwave and Wireless Components Letters, IEEE, vol. 17, pp. 217-219, Mar. 2007. https://doi.org/10.1109/LMWC.2006.890491
  5. M. Motoyoshi, M. Fujishima, "43 ${\mu}W$ 6 GHz CMOS divide-by-3 frequency divider based on threephase harmonic injection locking", ASSCC. IEEE, pp. 183-186, 2006. https://doi.org/10.1109/ASSCC.2006.357881
  6. Joonhee Lee, Seonghwan Cho, "A $470-{\mu}W$ multimodulus injection-locked frequency divider with division ratio of 2, 3, 4, 5 and 6 in $0.13-{\mu}m$CMOS", ASSCC. IEEE, pp. 332-335, 2007. https://doi.org/10.1109/ASSCC.2007.4425698
  7. Sanghoon Sim, Dong-Wook Kim, and Songcheol Hong, "A CMOS direct injection-locked frequency divider with high division ratios", Microwave and Wireless Components Letters, IEEE, vol. 19, pp. 314-316, May 2009. https://doi.org/10.1109/LMWC.2009.2017603

Cited by

  1. A 54-GHz Injection-Locked Frequency Divider Based on 0.13-㎛ RFCMOS Technology vol.22, pp.5, 2011, https://doi.org/10.5515/KJKIEES.2011.22.5.522