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Highly stable amorphous indium.gallium.zinc-oxide thin-film transistor using an etch-stopper and a via-hole structure

  • Mativenga, M. (Advanced Display Research Center, Kyung Hee University) ;
  • Choi, J.W. (Advanced Display Research Center, Kyung Hee University) ;
  • Hur, J.H. (Advanced Display Research Center, Kyung Hee University) ;
  • Kim, H.J. (Advanced Display Research Center, Kyung Hee University) ;
  • Jang, Jin (Advanced Display Research Center, Kyung Hee University)
  • Received : 2010.10.21
  • Accepted : 2010.11.22
  • Published : 2011.03.31

Abstract

Highly stable amorphous indium.gallium.zinc-oxide (a-IGZO) thin-film transistors (TFTs) were fabricated with an etchstopper and via-hole structure. The TFTs exhibited 40 $cm^2$/V s field-effect mobility and a 0.21 V/dec gate voltage swing. Gate-bias stress induced a negligible threshold voltage shift (${\Delta}V_{th}$) at room temperature. The excellent stability is attribute to the via-hole and etch-stopper structure, in which, the source/drain metal contacts the active a-IGZO layer through two via holes (one on each side), resulting in minimized damage to the a-IGZO layer during the plasma etching of the source/drain metal. The comparison of the effects of the DC and AC stress on the performance of the TFTs at $60^{\circ}C$ showed that there was a smaller ${\Delta}V_{th}$ in the AC stress compared with the DC stress for the same effective stress time, indicating that the trappin of the carriers at the active layer-gate insulator interface was the dominant degradation mechanism.

Keywords

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