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Electrical stabilities of half-Corbino thin-film transistors with different gate geometries

  • Jung, Hyun-Seung (MEMS Display and Sensor Laboratory, School of Electronic Engineering, Soongsil University) ;
  • Choi, Keun-Yeong (MEMS Display and Sensor Laboratory, School of Electronic Engineering, Soongsil University) ;
  • Lee, Ho-Jin (MEMS Display and Sensor Laboratory, School of Electronic Engineering, Soongsil University)
  • Received : 2011.10.18
  • Accepted : 2011.12.04
  • Published : 2012.03.30

Abstract

In this study, the bias-temperature stress and current-temperature stress induced by the electrical stabilities of half-Corbino hydrogenated-amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with different gate electrode geometries fabricated on the same substrate were examined. The influence of the gate pattern on the threshold voltage shift of the half-Corbino a-Si:H TFTs is discussed in this paper. The results indicate that the half-Corbino a-Si:H TFT with a patterned gate electrode has enhanced power efficiency and improved aperture ratio when compared with the half-Corbino a-Si:H TFT with an unpatterned gate electrode and the same source/drain electrode geometry.

Keywords

References

  1. C.R. Kagan and P. Andry, Thin-Film Transistors (Marcel Dekker, New York, 2003).
  2. W.H. Wolf, Modern VLSI Design, 3nd ed. (Prentice-Hall, Upper Saddle River, NJ, 1998).
  3. R. Schmechel, A. Hepp, H. Heil, M. Ahles, W. Weise, and H.V. Seggern, Proc. SPIE 5217, 101 (2003).
  4. R.F. Bianchi, R.K. Onmori, and R.M. Faria, J. Polym. Sci., Part B: Polym. Phys. 43, 74 (2005). https://doi.org/10.1002/polb.20298
  5. N. Matsuki, Y. Abiko, K. Miyazaki, M. Kobayashi, H. Fujioka, and H. Koinuma, Semicond. Sci. Technol. 19 (2004).
  6. N. Wakai, N. Yamamura, S. Sato, and M. Kanbara, U.S. Ratent 5055899 (1991).
  7. J. Lee, J. Huh, and D. Kim, U.S. Patent 6274884 (2001).
  8. H. Lee, G. Yoo, J.S. Yoo, and J. Kanicki, J. Appl. Phys. 105, 124522 (2009). https://doi.org/10.1063/1.3153968
  9. H. Lee, H. Jung, K. Choi, and J. Kanicki, Jap. J. Appl. Phys. 50, 120203 (2011). https://doi.org/10.7567/JJAP.50.120203
  10. H. Lee, C.H. Liu, and J. Kanicki, Jap. J. Appl. Phys. 50, 074203 (2011). https://doi.org/10.1143/JJAP.50.074203
  11. A. Kuo, T.K. Won, and J. Kanicki, IEEE Trans. Electron. Dev. 55, 1621-1629 (2008). https://doi.org/10.1109/TED.2008.924047
  12. H. Lee, J.-S. Yoo, C-D. Kim, I.-B. Kang, and J. Kanicki, IEEE Trans. Electron. Dev. 55 (2008).

Cited by

  1. P‐28: Novel Asymmetric Source‐drain Thin Film Transistors Fabricated by Atomic Layer Deposition vol.50, pp.1, 2012, https://doi.org/10.1002/sdtp.13177