JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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High-efficiency BIRA for embedded memories with a high repair rate and low area overhead

  • Lee, Joo-Hwan (Graduate School of Electrical and Electronic Engineering, Yonsei University) ;
  • Park, Ki-Hyun (Graduate School of Electrical and Electronic Engineering, Yonsei University) ;
  • Kang, Sung-Ho (Graduate School of Electrical and Electronic Engineering, Yonsei University)
  • Received : 2011.09.21
  • Published : 2012.09.30
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Abstract

High-efficiency built-in redundancy analysis (BIRA) is presented. The proposed BIRA uses three techniques to achieve a high repair rate using spare mapping registers with adjustable fault tags to reduce area overhead. Simulation results show that the proposed BIRA is a reasonable solution for embedded memories.

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References

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  4. Jeong, W., et al, "An advanced BIRA for memories with an optimal repair rate and fast analysis speed by using a branch analyzer," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., Vol. 29, No. 12, pp. 2014-2026, Dec., 2010. https://doi.org/10.1109/TCAD.2010.2062830

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